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Abstract In this study, we use microfabrication processes on silicon to produce a rectangular microchannel. The fabrication technology includes exposing, dry etching, and anodic bounding technologies. After fabrication finished, we use AFM and alpha-step to secure surface roughness. It is found a relatively low surface roughness about 3.34¢H with dimension of 0.5£gm¡Ñ100£gm¡Ñ5000£gm microchannel. A theoretical study and calculations, we also made with continuity equation and proper slip condition to analyze fluid behavior in microchannel. At present, several fluid informations in microchannel that incloud pressure drop, fluid velocity, and fluid mass flow rate were obtained.

Hot-pressing sintering Al2O3/5 vol% SiC gets detail research. Sub-boundaries and dislocations observed in grains. Most Burgers vectors are ¡Õ1120¡Ö.

n-channel and p-channel amorphous-silicon thin-film transistors (a-Si:H TFTs) with copper electrodes prepared by a novel plasma etching process have been fabricated and studied. Their characteristics are similar to those of TFTs with molybdenum electrodes. The reliability was examined by extended high-temperature annealing and gate-bias stress. High-performance CMOS-type a-Si:H TFTs can be fabricated with this plasma etching method. Electrical characteristics of a-Si:H TFTs after Co-60 irradiation and at different experimental stages have been measured. The gamma-ray irradiation damaged bulk films and interfaces and caused the shift of the transfer characteristics to the positive voltage direction. The field effect mobility, on/off current ratio, and interface state density of the TFTs were deteriorated by the irradiation process. Thermal annealing almost restored the original state's characteristics. Floating gate n-channel a-Si:H TFT nonvolatile memory device with a thin a- Si:H layer embedded in the SiNx gate dielectric layer has been prepared and studied. The hysteresis of the TFT's transfer characteristics has been used to demonstrate its memory function. A steady threshold voltage change between the "0" and "1" states and a large charge retention time of > 3600 s with the "write" and "erase" gap of 0.5 V have been detected. Charge storage is related to properties of the embedded a-Si:H layer and its interfaces in the gate dielectric structure. Discharge efficiencies with various methods, i.e., thermal annealing, negative gate bias, and light exposure, separately, were investigated. The charge storage and discharge efficiency decrease with the increase of the drain voltage under a dynamic operation condition. Optimum operating temperatures are low temperature for storage and higher temperature for discharge. a-Si:H metal insulator semiconductor (MIS) capacitor with a thin a-Si:H film embedded in the silicon nitride gate dielectric stack has been characterized for memory functions. The hysteresis of the capacitor's current-voltage and capacitance-voltage curves showed strong charge trapping and detrapping phenomena. The 9 nm embedded a-Si:H layer had a charge storage capacity six times that of the capacitor without the embedded layer. The nonvolatile memory device has potential for low temperature circuit applications.

Thesis (Ph.D.)--Murdoch University, 2008. / Thesis submitted to the Faculty of Minerals and Energy. Includes bibliographical references (leaves 238-246)

Includes bibliographical references (p. 58-59).

Thesis (Ph. D.)--University of Hong Kong, 2001. / Includes bibliographical references.

Thesis (Ph. D.)--Open University. BLDSC no. DX235484.

Thesis (Ph. D.)--University of Texas at Austin, 2000. / Vita. Includes bibliographical references (leaves 169-179). Available also in a digital version from Dissertation Abstracts.

Thesis (Ph. D.)--University of Texas at Austin, 2001. / Vita. Includes bibliographical references. Available also from UMI/Dissertation Abstracts International.