The high-voltage SiC power semiconductor devices have been developed in recent years. They cause an urgent in the need for the power semiconductor packaging to have not only low interconnect resistance, less noise, less parasitic oscillations, improved reliability, and better thermal management, but also High-Voltage (HV) blocking capability. The existing power semiconductor packaging technologies includes wire-bonding interconnect, press pack, flip-chip technology, metal posts interconnected parallel plates structure (MIPPS), dimple array interconnection (DAI), power overlay (POL) technology, and embedded power (EP) technology. None of them meets the requirements of low profile and high voltage rating. The objective of the work in this dissertation is to propose and design a high-voltage power semiconductor device packaging method with low electric field stress and low profile to meet the requirments of high-voltage blocking capability. The main contributions of the work presented in this dissertation are: 1. Understanding the electric field distribution in the package. The power semiconductor packaging is simulated by using Finite Element Analysis (FEA) software. The electric field distribution is known and the locations of high electric field concentration are identified. 2. Development of planar high-voltage power semiconductor device packaging method With the proposed structure in the dissertation, the electric field distribution of a planar device package is improved and the high electric field intensity is relieved. 3. Development of design guidelines for the propsed planar high-voltage device packaging method. The influence of the structure dimensions and the material properties is studied. An optimal design is identified. The design guideline is given. 4. Fabrication and experimental verification of the proposed high-voltage device packaging method A detailed fabrication procedure which follows the design guideline is presented. The fabricated modules are tested by using a high power curve tracer. Test results verify the proposed method. 5. Simplification of the structure model of the proposed device package The package structure model is simplified through the elimination of power semiconductor device internal structure model. The simplified model can be simulated by a non-power device simulator. The simulation results of the simplified model match the simulation results of the complete model very well. / Ph. D.

Le carbure de silicium (SiC) possède plusieurs propriétés exceptionnelles comme une large bande interdite, un champ électrique critique et une vitesse de saturation des porteurs élevée pour remplacer le silicium (Si) dans des domaines de fonctionnement jusque-là inaccessibles avec le Si. Un nombre important de démonstrateurs des composants de puissance en SiC faisant état de performances remarquables ainsi que la disponibilité commerciale des composants en SiC confirment la maturité de la filière SiC et montrent les progrès technologiques réalisés au cours des dernières années. Cependant, il existe peu d’études sur les coefficients d’ionisation du SiC, lesquels sont pourtant indispensables pour prévoir précisément la tenue en tension des composants de puissance en SiC. Ce travail contribue donc à mieux déterminer ces coefficients. Pour cela, un bon nombre de diodes spécialement conçues pour la détermination des coefficients d’ionisation du SiC par la technique OBIC (Optical Beam Induced Current) ont été réalisées sur différents wafers de SiC-4H et de SiC-6H, deux polytypes courant du SiC. Cette technique repose sur un faisceau de laser ultraviolet qui génère des paires électrons-trous dans la zone de charge d’espace d’une diode sous test. La mesure du courant résultant permet d’accéder aux coefficients d’ionisation. A partir des mesures OBIC sur les diodes réalisées, nous avons pu déduire les coefficients pour ces deux polytypes du SiC. Plus particulièrement, les coefficients d’ionisation du SiC-4H sont déterminés dans une large gamme de champ électrique grâce aux mesures sur les différents dopages. Les paramètres des coefficients déterminés dans ce travail peuvent être utilisés en conception de dispositifs haute tension pour prédire plus précisément l’efficacité de leur protection périphérique. / Silicon carbide (SiC) has several exceptional properties as a wide band-gap, a high critical electric field and a high saturation velocity of carriers to replace silicon (Si) in the applications previously inaccessible with Si. A significant number of SiC power devices showing outstanding performances and the commercial availability of SiC devices confirm the maturity of SiC industry and show the SiC technological advances in recent years. However, there are few studies on the ionization coefficients in SiC, which nevertheless essential to accurately predict the breakdown voltage of SiC power devices. This work contributes to better determine these coefficients. For this, numerous diodes which are specifically designed for the determination of ionization coefficients in SiC by using OBIC (Optical Beam Induced Current) technique were realized on different wafers of 4H-SiC and 6H-SiC, two usual polytypes of SiC. This technique relies on an ultraviolet laser beam which generates electron-hole pairs in the space charge region of a diode under test. The resulting current measurement provides access to the ionization coefficients. From OBIC measurements performed on the diodes, we were able to deduce the ionization coefficients for the both polytypes of SiC. In particular, the ionization coefficients for 4H-SiC are determined in a wide range of electric field through measurements on devices with different doping level. The parameters of ionization coefficients determined in this work can be used in design of high voltage devices to predict more accurately the efficiency of periphery protections.