The conventional way of cryptanalysis is based on the cryptographic algorithms weak points examine. The attack model of conventional cryptanalysis covers mathematical description of the cryptographic algorithm used. This model is not with the relation to the physical model implementation and the real environment. Cryptographic algorithms currently used in the combination with strong cipher keys are almost unbreakable and the conventional cryptanalysis is ineffective. The new way of cryptanalysis employs the side channels. The model of cryptanalysis using side channels is enhanced with physical revelation of module performing the cryptographic operations. This dissertation thesis deals with cryptographic module description and studies influence of side channels to the security of this module.

The work is mainly concerned with the possibilities of breaking the encryption algorithm AES with using of non-template attacks. In the introduction are listed techniques of differential analysis, which are using in the present, but for the sake of completeness is there mention about simple power analysis. In the next chapters are briefly described countermeasures against power analysis and further is described the AES algorithm. Most important parts are chapters where are described attack implementation on AES-128 through correlation power analysis and mutual information analysis. These attacks exploit power traces from www pages dedicated to book Power Analysis Attacks - Revealing the Secrets of Smartcards, http://DPAbook.org and especially to power traces from DPA Contest 4.2, http://www.dpacontest.org. In conclusion is comparison of methods based on the number of power traces needed for finding the key of secret message.

The presented work deals with basic characteristics of the side-channel machines. The intention is to replace the pressure reducing valve by low-specific speed side-channel turbine. Thereby creating a kind of turbine valve using energy, which would otherwise be dissipated in the valve. Pressure reducing valves are the source of large hydraulic losses and their replacement is possible, because the same resistance characteristics side-channel turbine and a pressure reducing valve.

Au cours de cette thèse, nous nous sommes concentrés sur la sécurité des appareils mobiles. Pour cela, nous avons exploré les attaques physiques par perturbation (injection de fautes) ainsi que par observation, toutes deux basées sur les émissions électromagnétiques. Nous avons sélectionné deux types de cibles représentant deux catégories d'appareils mobiles. D'une part les microcontrôleurs qui équipent les appareils de type IoT. Et d'autre part les System-on-Chip (SoC) que l'on retrouve sur les smartphones. Nous nous sommes concentrés sur les puces conçue par ARM. Au travers d'attaques physiques nous avons voulu montrer qu'il était possible d'affecter la microarchitecture sur laquelle repose tout le fonctionnement de ces systèmes. Toutes les protections pouvant être mises en place par la suite au niveau logiciel, sont basées sur la microarchitecture et deviennent donc inopérantes lorsque l'on s'attaque à celle-ci. Pour les appareils de type IoT, nous avons mis en évidence la possibilité d'obtenir des informations ou un contrôle total de l'appareil à l'aide d'une injection de faute. Les injections de fautes sont dans ce cas les déclencheurs d'attaques logicielles et permettent d'outrepasser des protections logicielles. Pour les appareils de type smartphone, nous avons dans un premier temps été capable d'extraire des informations contenue à l'intérieur d'un SoC, à l'aide d'une écoute électromagnétique et de la caractérisation du comportement de celui-ci. Dans un deuxième temps, nous avons pu montrer qu'en cas de faute des comportements aléatoire peuvent se produire, tout en caractérisant ces comportements. Démontrant ainsi que sur des systèmes plus complexes, il est tout de même possible d'avoir recours à des attaques physiques. Enfin nous avons proposé des pistes d'améliorations en lien avec nos différentes constatations au cours de ces travaux. / During this thesis, we focused on the security of mobile devices. To do this, we explored physical attacks by perturbation (fault injections) as well as by observation, both based on electromagnetic emissions. We selected two types of targets representing two categories of mobile devices. On the one hand, the microcontrollers that equip IoT devices. And on the other hand the System-on-Chip (SoC) that can be found on smartphones. We focused on the chips designed by ARM. Through physical attacks we wanted to show that it was possible to affect the microarchitecture on which the entire functioning of these systems is based. All the protections that can be implemented later at the software level are based on the microarchitecture and therefore become ineffective when it is attacked. For IoT devices, we have highlighted the possibility of obtaining information or total control of the device by means of a fault injection. In this case, fault injections are used as software attack triggers. They also allow software protection to be bypassed. For smartphone devices, we were initially able to extract information contained within a SoC, using electromagnetic listening and characterization of its behavior. In a second step, we were able to show that in the event of a fault, random behaviours can occur, we characterized and proposed explanations for these behaviours. Demonstrating and on systems more advanced than IoT, it is still possible to use physical attacks. Finally, we proposed possible improvements in relation to our various findings during this work.

The use of deep learning for side channel analysis has shown a lot of success in recent years. Impressive results have been presented by many researchers. However, critics of this approach have voiced concerns about the ad hoc methodologies and bespoke neural network designs used in many presented approaches. This thesis first analyzes a possibility of generalizing the selection of neural network architecture for side channel analysis. Then, it presents a simple model for a multilayer perceptron network that does not need to be altered for different targets. Experiments are conducted on three different data sets; power consumption measurements of USIMs, far-field electromagnetic measurements of a Bluetooth device, and power consumption measurements of dedicated XMega victim boards. For each of these sets a model is presented with equivalent or better than state-of-the art results for secret key recovery. Training and testing are done on separate devices in each case. One of the models achieves a classification accuracy of 94.5% from a single measurement. Furthermore, the target and the training device do not even share the same printed circuit board layout. Another model achieves a 47.4% classification accuracy from measurements captured in a manner that is possible in a real-world attack. The thesis also investigates if three different numerical ways of determining the leakage point in unprotected implementations of AES agree. The tests are applied to all three data sets. Finally the thesis evaluates whether the popular transformer architecture is beneficial for side channel analysis. / Användande av djupinlärning för sidokanalsanalys har haft stora framgångar de senaste åren. Imponerande resultat har presenterats av många forskare. Men kritiker av detta tillvägagångssätt har uttryckt oro över att metoderna är ad hoc, och att specialanpassade neuronnätverksdesigner används i många presenterade rapporter. Detta examensarbete undersöker först möjligheten att generalisera valet av neuronnätverksarkitekturer för sidokanalsanalys. Sedan presenterar jag en enkel modell för ett multilayer perceptron-nätverk som inte behöver anpassas för olika enheter. Experiment genomförs på tre olika dataset; strömförbrukningsmätningar av USIMs, elektromagnetiska mätningar i fjärrfält av en Bluetooth-enhet, och strömförbrukningsmätningar av dedikerade XMega sidokanalsanalys-enheter. För var och en av dessa enheter presenteras en modell med likvärdiga eller bättre resultat som tidigare publicerad forskning. Träning och testning görs på separata enheter i varje fall. En av modellerna uppnår en klassificeringsprecision på 94,5% från en enda mätning. Dessutom delar attackenheten och träningsenheten inte ens samma kretskortslayout. En annan modell uppnår en klassificeringsprecision på 47,4% från mätningar som gjorts på ett sätt som ar realistiskt i en verklig attack. Examensarbetet undersöker också om tre olika numeriska sätt att bestämma läckagepunkten i oskyddade implementeringar av AES överensstämmer. Testerna tillämpas på alla tre dataset. Slutligen utvärderar examensarbetet om den populära transformer-arkitekturen ar passande för sidokanalsanalys.

Dans un environnement virtualisé, l'hyperviseur fournit l'isolation au niveau logiciel, mais l'infrastructure partagée rend possible des attaques au niveau matériel. Les attaques par canaux auxiliaires ainsi que les canaux cachés sont des problèmes bien connus liés aux infrastructures partagées, et en particulier au partage du processeur. Cependant, ces attaques reposent sur des caractéristiques propres à la microarchitecture qui change avec les différentes générations de matériel. Ces dernières années ont vu la progression des calculs généralistes sur processeurs graphiques (aussi appelés GPUs), couplés aux environnements dits cloud. Cette thèse explore ces récentes évolutions, ainsi que leurs conséquences en termes de fuites d'information dans les environnements virtualisés. Premièrement, nous investiguons les microarchitectures des processeurs récents. Notre première contribution est C5, un canal caché sur le cache qui traverse les coeurs d'un processeur, évalué entre deux machines virtuelles. Notre deuxième contribution est la rétro-ingénierie de la fonction d'adressage complexe du dernier niveau de cache des processeurs Intel, rendant la classe des attaques sur les caches facilement réalisable en pratique. Finalement, dans la dernière partie nous investiguons la sécurité de la virtualisation des GPUs. Notre troisième contribution montre que les environnements virtualisés sont susceptibles aux fuites d'informations sur la mémoire d'un GPU. / In a virtualized environment, the hypervisor provides isolation at the software level, but shared infrastructure makes attacks possible at the hardware level. Side and covert channels are well-known issues of shared hardware, and in particular shared processors. However, they rely on microarchitectural features that are changing with the different generations of hardware. The last years have also shown the rise of General-Purpose computing on Graphics Processing Units (GPGPU), coupled to so-called cloud environments. This thesis explores these recent evolutions and their consequences in terms of information leakage in virtualized environments. We first investigate the recent processor microarchitectures. Our first contribution is C5, a cross-core cache covert channel, evaluated between virtual machines. Following this work, our second contribution is the reverse engineering of the complex addressing function of the last-level cache of Intel processors, rendering the class of cache attacks highly practical. In the last part, we investigate the security of GPU virtualization. Our third contribution shows that virtualized environments are susceptible to information leakage from the GPU memory.

Depuis la publication en 1999 du papier fondateur de Paul C. Kocher, Joshua Jaffe et Benjamin Jun, intitulé "Differential Power Analysis", les attaques par canaux auxiliaires se sont révélées être un moyen d’attaque performant contre les algorithmes cryptographiques. En effet, il s’est avéré que l’utilisation d’information extraite de canaux auxiliaires comme le temps d’exécution, la consommation de courant ou les émanations électromagnétiques, pouvait être utilisée pour retrouver des clés secrètes. C’est dans ce contexte que cette thèse propose, dans un premier temps, de traiter le problème de la réduction de dimension. En effet, en vingt ans, la complexité ainsi que la taille des données extraites des canaux auxiliaires n’a cessé de croître. C’est pourquoi la réduction de dimension de ces données permet de réduire le temps et d’augmenter l’efficacité des attaques. Les méthodes de réduction de dimension proposées le sont pour des modèles de fuites complexe et de dimension quelconques. Dans un second temps, une méthode d’évaluation d’algorithmes logiciels est proposée. Celle-ci repose sur l’analyse de l’ensemble des données manipulées lors de l’exécution du logiciel évalué. La méthode proposée est composée de plusieurs fonctionnalités permettant d’accélérer et d’augmenter l’efficacité de l’analyse, notamment dans le contexte d’évaluation d’implémentation de cryptographie en boîte blanche. / Since the publication in 1999 of the seminal paper of Paul C. Kocher, Joshua Jaffe and Benjamin Jun, entitled "Differential Power Analysis", the side-channel attacks have been proved to be efficient ways to attack cryptographic algorithms. Indeed, it has been revealed that the usage of information extracted from the side-channels such as the execution time, the power consumption or the electromagnetic emanations could be used to recover secret keys. In this context, we propose first, to treat the problem of dimensionality reduction. Indeed, since twenty years, the complexity and the size of the data extracted from the side-channels do not stop to grow. That is why the reduction of these data decreases the time and increases the efficiency of these attacks. The dimension reduction is proposed for complex leakage models and any dimension. Second, a software leakage assessment methodology is proposed ; it is based on the analysis of all the manipulated data during the execution of the software. The proposed methodology provides features that speed-up and increase the efficiency of the analysis, especially in the case of white box cryptography.

This thesis deals with timing analysis of the AES (Advanced Encryption Standard). The design of {\em Rijndael\/}, which is the AES algorithm, is described here. For the side channel attacks is necessary to know the principles of the cache memory in CPU and its architecture. In this thesis are involved major security problems of AES which can be used for successful attacks. Several different implementations of AES are discussed too. Several types of timing attaks are also described. According to the experimentations these attacks should be efficient to the most presently used AES implementations. Finally, the results of this work are described, possible countermeasures against this attack and motions for the next research.

One of the key security aspects which must be evaluated for cryptosystems is their resistance against side-channel attacks. Masking is a commonly used countermeasure against side-channel attacks, in which the secret to be protected is partitioned into multiple shares using random “masks”. A k-order masked implementation uses k+1 shares. Masked implementations are available for the key encapsulation mechanism of Saber, a finalist in the NIST post-quantum cryptography standardization project. Though Saber has not been selected for standardization, it is similar to the selected CRYSTALS-Kyber, and may therefore have similar leakage. In this thesis, a side-channel attack against a higher-order masked implementation of Saber is attempted. A previous attack on first-order masked Saber using a deep learning-based approach is used as a starting point, though differences in the implementations make the attack not directly applicable to the higher-order case. A byte-wise leakage is found in the higher-order masked implementation, and two different attacks on this leakage point are considered. The first uses the Hamming weights of bytes and is able to recover Hamming weights of individual shares but not the complete message or secret keys from 2nd-order masked Saber. The other uses a method from a different previous side-channel attack in which message bytes are recovered using biased deep learning models. This method successfully recovers all message bytes from 1st-order masked Saber and is shown to successfully recover byte values from 2nd-order masked Saber by training multiple biased models and selecting the best performing models from these, though this also requires a much larger amount of attack data than the 1st-order masking case. This shows that a bytewise leakage in higher-order masked Saber can be exploited using a power analysis side-channel attack, though recovering the complete message and secret keys remains as future work. / En av de främsta säkerhetsaspekterna som måste utvärderas för krypteringsalgoritmer är resistens mot sidokanalsattacker. Maskning är en av de vanligaste åtgärderna för att skydda mot sidokanalsattacker, där känslig information partitioneras i flera delar med hjälp av slumpmässiga värden. En maskning av ordning k använder k+1 delar. Maskade implementationer finns tillgängliga för Saber, en av finalisterna NISTs postkvantkryptografiska standardiseringsprojekt. Saber har inte valts som standard, men har många likheter med den valda standarden CRYSTALS-Kyber och kan därför ha liknande sårbarheter. I detta examensarbete utförs en sidokanalsattack på en högre ordnings maskad implementation av Saber. En tidigare attack på första ordningens maskad Saber används som utgångspunkt, men skillnader i implementationen gör att denna attack inte kan användas direkt. Ett läckage på byte-nivå hittads i den högre ordnings maskade implementationen, och två olika attacker utförs. Den första, som använder Hammingvikten av en byte i meddelandet, kunde erhålla Hammingvikterna för individuella delar av det maskade meddelandet, men inte det ursprungliga meddelandet. Den andra attacken använder en metod från en tidigare sidokanalsattack där meddelanden kunde erhållas med hjälp av partiska djupinlärningsmodeller. Den här metoded kunde användas för att erhålla alla bytevärden från meddelandet med fösta ordningens maskning. Med betydligt mer data och genom att träna ett flertal djupinlärningsmodeller och sedan välja de bästa från bland dessa kunda även vissa bytevärden erhållas från andra ordningens maskning. Detta visar att denna svaghet på byte-nivå kan användas vid en attack på högre ordnings maskad Saber, men det återstår att extrahera hela meddelandet och hemliga nycklar.

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