Thesis (M.S.)--Missouri University of Science and Technology, 2009. / Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed November 16, 2009) Includes bibliographical references (p. 90-91).

Thesis (M.S.)--Oregon State University, 2010. / Printout. Includes bibliographical references (leaves 74-76). Also available on the World Wide Web.

Thesis (M.S.)--Missouri University of Science and Technology, 2009. / Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed November 17, 2009) Includes bibliographical references (p. 61-62).

As the ever-advancing fabrication technologies in semiconductor industry enable the VLSI circuits with increasing integration and decreasing cost, the circuits suffer from much severer Signal Integrity (SI) faults, where SI is the capability of signals generating correct responses in their downstream circuits. SI faults are complex problems to tackle since SI may be damaged by numerous kinds of causes and SI faults may impact multiple aspects of circuits' performance. Such SI problems can seriously reduce product yield, result in function error or even permanently damage the chip. Therefore, effective testing methodologies are essential to alleviate SI problems by verifying the SI satisfaction of VLSI circuits efficiently. / Hereby the thesis has examined the SI problems systematically and proposed effective test methods corresponding to the specific feature of SI faults. Firstly, considering that SI on inter-core interconnects of SOCs is under severe danger, new test wrapper design has been proposed to achieve accurate SI test on interconnects. Secondly, test architecture has been optimized for cost reduction considering SI test and logic test simultaneously. Thirdly, the impact of power distribution network (PDN) defects on SI has been analyzed and efficient computation method has been proposed to identify those potentially harmful PDN defects. Effective test pattern manipulation method has also been proposed to improve test coverage of PDN defects. Fourthly, considering the increasing impact of process variation and aging effect on SI, an innovative online test architecture has been proposed, which can accurately measure the delay of critical paths when the circuit is working in function mode, where such valuable information is of great help for a variety of applications. / Zhang, Yubin. / Adviser: Qiang Xu. / Source: Dissertation Abstracts International, Volume: 73-06, Section: B, page: . / Thesis (Ph.D.)--Chinese University of Hong Kong, 2011. / Includes bibliographical references (leaves 121-133). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. [Ann Arbor, MI] : ProQuest Information and Learning, [201-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.

published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy

The objective of this dissertation is to develop electrical modeling and co-simulation methodologies for signal and power integrity of package and board applications. The dissertation includes 1) the application of the finite element method to the optimization for decoupling capacitor selection and placement on a power delivery network (PDN), 2) the development of a PDN modeling method effective for multidimensional and multilayer geometries, 3) the analysis and modeling of return path discontinuities (RPDs), and 4) the implementation of the absorbing boundary condition for PDN modeling. The optimization technique for selection and placement of decoupling capacitors uses a genetic algorithm (GA) and the multilayer finite element method (MFEM), a PDN modeling method using FEM. The GA is customized for the decoupling problem to enhance the convergence speed of the optimization. The mathematical modifications necessary for the incorporation of the capacitor model into MFEM is also presented. The main contribution of this dissertation is the development of a new modeling method, the multilayer triangular element method (MTEM), for power/ground planes of a PDN. MTEM creates a surface mesh on each plane-pair using dual graphs; a non-uniform triangular mesh (Delaunay triangulation) and its orthogonal counterpart (Voronoi diagram), to which electromagnetic and equivalent circuit concepts are applied. The non-uniform triangulation is especially efficient for discretizing multidimensional and irregular geometries which are common in package and board PDNs. Moreover, MTEM generates a sparse, banded, and symmetric system matrix, which enables efficient computations. For a given plane-pair, MTEM extracts an equivalent circuit that is consistent with the physics-based planar-circuit model of a plane-pair. Thus, the values of the lumped elements can be simply calculated from the physical parameters, such as material properties and mesh geometries of each unit-cell. Consequently, the modeling of MTEM is flexible and easy to modify for further extensions, such as the incorporation of external circuits, e.g. decoupling capacitors and vertical interconnects. Power and ground planes provide paths for the return current of signal traces. Typically, planes have discontinuities such as via holes, plane cutouts, and split planes that disturb flow of signal return currents. At the discontinuity, return currents have to detour or switch to different layers, causing signal and power integrity problems. Therefore, a separate analysis of signal interconnects will neglect the significant coupling with a PDN, and the result will not be reliable. In this dissertation, the co-simulation of the signal and power integrity is presented focusing on the modeling of RPDs created by split planes, apertures, and vias. Plane resonance is one of the main sources of power integrity problems in package and board PDNs. A number of techniques have been developed and published in literature to reduce or prevent the resonance of a plane-pair. One of the techniques is to surround plane-pair edges with absorbing material that effectively damps the outgoing parallel-plate wave and minimizes the reflection. To model this behavior, the boundary condition of MTEM needs to be changed from its original form, the open-circuit boundary condition. In this dissertation, the application of the 1st order absorbing boundary condition to MTEM is presented.

This dissertation is aimed at examining signal integrity degradation factors and realizing signal integrity enhancement circuits for both wired and wireless communication systems. For wired communication systems, an optical coherent system employing an electrical equalization circuit is studied as a way of extending the transmission distance limited by optical fiber dispersion mechanisms. System simulation of the optical coherent receiver combined with the feed-forward equalizers is performed to determine the design specification of the equalizer circuit. The equalization circuit is designed and implemented in a 0.18 µm complementary metal-oxide semiconductor (CMOS) process and demonstrates the capability to extend the transmission reach of long-haul optical systems over single-mode fiber to 600 km. Additionally, for wireless applications, signal integrity issues found in a full-duplex wireless communication network are examined. Full-duplex wireless systems are subject to interference from their own transmitter leakage signals; thus, a transmitter leakage cancellation circuit is designed and implemented in a 0.18 µm CMOS technology. The proposed cancellation circuit is integrated with a low-noise amplifier and demonstrates over 20 dB of transmitter leakage signal suppression.