Inorganic material based electronics and photonics on unconventional substrates have shown tremendous unprecedented applications, especially in areas that traditional wafer based electronics and photonics are unable to cover. These areas range from flexible and conformal consumer products to biocompatible medical devices. This thesis presents the research on single crystal silicon nanomembrane photonics on different substrates, especially flexible substrates. A transfer method has been developed to transfer silicon nanomembrane defect-freely onto glass and flexible polyimide substrates. Using this method, intricate single crystal silicon nanomembrane device, such as photonic crystal microcavity, has been transferred onto flexible substrates. To test the device, subwavelength grating couplers are designed and implemented to couple light in and out of the transferred waveguides with high coupling efficiency. The cavity shows a quality factor ~ 9000 with water cladding and ~30000 with glycerol cladding, which is comparable to the same cavity demonstrated on silicon-on-insulator platform, indicating the high quality of the transferred silicon nanomembrane. The device could be bended to a radius less than 15 mm. The experiments show that the resonant wavelength shifts to longer wavelength under tensile stress, while it shifts to shorter wavelength under compressive stress. The sensitivity of the cavity is ~70 nm/RIU, which is independent of bending radius. This demonstration opens vast possibilities for a whole new range of high performance, light-weight and conformal silicon photonic devices. The techniques and devices (e.g. wafer bonding, stamp printing, subwavelength grating couplers, and modulator) generated in the research can also be beneficial for other research fields. / text

Large on-chip bandwidths required for high performance electronic chips will render optical components essential parts of future on-chip interconnects. Silicon photonics enables highly integrated photonic integrated circuit (PIC) using CMOS compatible process. In order to maximize the bandwidth density and design flexibility of PICs, vertical integration of electronic layers and photonics layers is strongly preferred. Comparing deposited silicon, single crystalline silicon offers low material absorption loss and high carrier mobility, which are ideal for multi-layer silicon PIC. Three different methods to build multi-layer silicon PICs based on single crystalline silicon are demonstrated in this dissertation, including double-bonded silicon-on-insulator (SOI) wafers, transfer printed silicon nanomembranes, and adhesively bonded silicon nanomembranes. 1-to-12 waveguide fanouts using multimode interference (MMI) couplers were designed, fabricated and characterized on both double-bonded SOI and transfer printed silicon nanomembrane, and the results show comparable performance to similar devices fabricated on SOI. However, both of these two methods have their limitations in optical interconnects applications. Large and defect-free silicon nanomembrane fabricated using adhesive bonding is identified as a promising solution to build multi-layer silicon PICs. A double-layer structure constituted of vertically integrated silicon nanomembranes was demonstrated. Subwavelength length based fiber-to-chip grating couplers were used to couple light into this new platform. Three basic building blocks of silicon photonics were designed, fabricated and characterized, including 1) inter-layer grating coupler based on subwavelength nanostructure, which has efficiency of 6.0 dB and 3 dB bandwidth of 41 nm, for light coupling between layers, 2) 1-to-32 H-tree optical distribution, which has excess loss of 2.2 dB, output uniformity of 0.72 dB and 3 dB bandwidth of 880 GHz, 3) waveguide crossing utilizing index-engineered MMI coupler, which has crossing loss of 0.019 dB, cross talk lower than -40 dB and wide transmission spectrum covering C-band and L-band. The demonstrated integration method and silicon photonic devices can be integrated into the CMOS back-end process for clock distribution and global signaling. / text