Multiple dielectric crossing waveguides are indispensable in building a complex optical integrated circuit. Since each input/output waveguide will have many crossings, it is important to design a low-loss waveguide crossing to ensure the overall radiation loss is kept at a minimum. The beam propagation method (BPM) is usually the method of choice for modeling large but low-index-contrast waveguide devices. BPM assumes one-way propagation and adopts the paraxial approximation. It is neither able to consider reflection of electromagnetic (EM) fields nor to perform wide angle propagation of forward fields. Therefore, it can not be used to analyze perpendicular dielectric crossing waveguides. At a maximum 0.5 dB power loss per crossing, the difficulty of simulation a waveguide crossing is how to compute the complex coupling waves with high enough precision. In this thesis, two-dimensional planar integrated optical waveguide crossing is studied in detail for the through and cross power coupling coefficients with the finite-difference frequency-domain (FD-FD) method. By exploiting the dual symmetries: the ¡§+¡¨ symmetry and the ¡§X¡¨ symmetry in the perpendicular crossing waveguide, we are able to compute the EM fields and their power coefficients without using artificial absorbing boundary conditions (ABC) nor using the perfectly matching layer (PML). We develop the layer-mode based transparent boundary condition (LM-TBC) [1] for launching the fundamental incident mode as well as transmitting the reflected and scattered wave fields off the crossing area. Numerical results including the field distribution, power coefficients are carefully verified and the convergent comparisons are also studied in the thesis.

Large on-chip bandwidths required for high performance electronic chips will render optical components essential parts of future on-chip interconnects. Silicon photonics enables highly integrated photonic integrated circuit (PIC) using CMOS compatible process. In order to maximize the bandwidth density and design flexibility of PICs, vertical integration of electronic layers and photonics layers is strongly preferred. Comparing deposited silicon, single crystalline silicon offers low material absorption loss and high carrier mobility, which are ideal for multi-layer silicon PIC. Three different methods to build multi-layer silicon PICs based on single crystalline silicon are demonstrated in this dissertation, including double-bonded silicon-on-insulator (SOI) wafers, transfer printed silicon nanomembranes, and adhesively bonded silicon nanomembranes. 1-to-12 waveguide fanouts using multimode interference (MMI) couplers were designed, fabricated and characterized on both double-bonded SOI and transfer printed silicon nanomembrane, and the results show comparable performance to similar devices fabricated on SOI. However, both of these two methods have their limitations in optical interconnects applications. Large and defect-free silicon nanomembrane fabricated using adhesive bonding is identified as a promising solution to build multi-layer silicon PICs. A double-layer structure constituted of vertically integrated silicon nanomembranes was demonstrated. Subwavelength length based fiber-to-chip grating couplers were used to couple light into this new platform. Three basic building blocks of silicon photonics were designed, fabricated and characterized, including 1) inter-layer grating coupler based on subwavelength nanostructure, which has efficiency of 6.0 dB and 3 dB bandwidth of 41 nm, for light coupling between layers, 2) 1-to-32 H-tree optical distribution, which has excess loss of 2.2 dB, output uniformity of 0.72 dB and 3 dB bandwidth of 880 GHz, 3) waveguide crossing utilizing index-engineered MMI coupler, which has crossing loss of 0.019 dB, cross talk lower than -40 dB and wide transmission spectrum covering C-band and L-band. The demonstrated integration method and silicon photonic devices can be integrated into the CMOS back-end process for clock distribution and global signaling. / text