This thesis presents the low cost process for UBM formation on aluminum pads of single die/dice for Flip Chip applications. The UBM (Under Bump Metallurgy) is required in solder bump structure to provide adhesion/diffusion barrier layer, solder wettable layer, and oxidation barrier layer between the bonding pads of the die and the bumps. Typically, UBM is deposited on the whole wafers by sputtering, evaporation, or electroless plating. These deposition techniques are not practical for UBM formation on single die/dice, thus preventing Flip Chip technology to be applied in applications where the whole wafers are not available. The process presented in this thesis has been developed to overcome this problem. The developed UBM formation process allows the UBM layer to be deposited on a single die, thus eliminating the requirement to have the whole wafer in the deposition process. With the combination of the UBM formation process developed in this work and a suitable bump formation technique, solder bumping on a single die can be achieved, thus making Flip Chip technology available for use in low volume applications and prototyping stages. The developed UBM formation process consists of two major steps; temporary die attach process and UBM deposition process. The first process is developed using thermoplastic adhesive film. The second process is developed using electroless nickel plating, followed by gold immersion. It has been demonstrated in this thesis that the developed process can be used to form the UBM layer on the die successfully regardless of the die size and the complexity of the die pattern, and that this process does not damage nor affect electrically the sensitive die. / Master of Science

L'électronique de puissance est en pleine mutation matérielle, technologique et conceptuelle. Cette évolution bouscule l'approche traditionnelle de la conception et de la fabrication des convertisseurs statiques avec pour objectif de proposer des solutions plus performantes, plus fiables et plus compactes et tout cela dans un contexte technico économique de plus en plus exigeant. Cette thèse analyse et expérimente un concept innovant de terminaisons en tension verticales ouvrant la voie vers l'intégration en 3D des composants de puissance mais également l'intégration, au sein même de la zone active d'un échangeur thermique. En s'appuyant sur la technique de réalisation des tranchées profondes issue de la micro électronique, ce document présente une approche permettant la co-intégration de plusieurs composants de puissance indépendants partageant la même électrode et le même substrat en face arrière. L'autre volet de ce travail de thèse est focalisé sur le concept DRIM Cooler (Drift Region Integrated Microchannel Cooler), un réseau de microcanaux perpendiculaires au plan de jonction du composant de puissance permettant son refroidissement direct. Les analyses numériques sont complétées par de nombreuses réalisations, caractérisations et mises en œuvre des approches précitées. / The power electronics field is struggling for new material, technological and conceptual evolutions. These changes induce breakthrough in the conventional design and fabrication of static power converters with the aim to offer more efficient, reliable and compact solutions in an increasingly demanding techno economical context. This PhD thesis presents the results obtained by analyzing, realizing and characterizing an innovative concept based on vertical voltage terminations that opens the way towards the 3D integration of power devices. Moreover, the proposed concept authorizes the integration of a microchannel cooler directly into the drift region of the power device. Based on the realization of deep trench terminations, a technique initially developed for the microelectronics field, this PhD thesis presents an approach allowing the integration of multiple power devices in the same die, all sharing the same backside electrode. This document also focuses on the DRIM Cooler (Drift Region Integrated Microchannel Cooler) concept that allows the direct cooling of the device through multiple parallel microchannels integrated perpendicular to the plane of the device's PN junction. The analytical analysis is completed with numerous realizations, characterizations and practical implementations of the above mentioned concepts.