Software radios (SWR) have been proposed for wireless communication systems to enable them to operate according to incompatible wireless communication standards by implementing most analog functions in the digital section on software-reprogrammable hardware. However, this significantly increases the required computations for SWR functionality, mainly because of the digital front-end computationally intensive filtering functions, such as sample rate conversion (SRC), channelization, and equalization. For increasing the computational efficiency of SWR systems, two new SRC methods with better performance than conventional SRC methods are presented. In the first SRC method, we modify the conventional CIC filters to enable them to perform SRC on slightly oversampled signals efficiently. We also describe a SRC method with high efficiency for SRC by factors greater than unity at which SRC in SWR systems may be computationally demanding. This SRC method efficiently increases the sample rate of wideband signals, especially in SWR base station transmitters, by applying Lagrange interpolation for evaluating output samples hierarchically using a low-rate signal that is computed with low cost from the input signal. A new channelizer/synthesizer is also developed for extracting/combining frequency multiplexed channels in SWR transceivers. The efficiency of this channelizer/synthesizer, which uses modulated perfect reconstruction (PR) filter banks, is higher than polyphase filter banks (when applicable) for processing few channels, and significantly higher than discrete filter banks for processing any number of variable-bandwidth channels where polyphase filter banks are inapplicable. Because the available methods for designing modulated PR filter banks are inapplicable due to the required number of subchannels and stopband attenuation of the prototype filters, a new design method for these filter banks is introduced. This method is reliable and significantly faster than the existing methods. Modulated PR filter banks are also considered for implementing a frequency-domain block blind equalizer capable of equalizing SWR signals transmitted though channels with long impulse responses and severe intersymbol interference (ISI). This blind equalizer adapts by using separate sets of weights to correct for the magnitude and phase distortion of the channel. The adaptation of this blind equalizer is significantly more reliable and its computational requirements increase at a lower rate compared to conventional time-domain equalizers making it efficient for equalizing long channels that exhibit severe ISI.

Thesis (MScEng (Electrical and Electronic Engineering))--Stellenbosch University, 2008. / This thesis describes the design and implementation of a software platform for software defined radio (SDR). This platform was to form part of an experimental satellite payload. Several other experiments were also housed on this platfrom and subsequently had to be incorporated into the design. The hardware components of the payload were already de- termined at the start of the project but firmware had to be created as part of the project. The software platform was based on the Linux kernel. Device drivers had to be designed for the hardware and firmware components. These drivers were designed so that standard Unix utilities could be used to interact with them. This allowed for easy testing of the system and the programs running on it. The use of the platform for modulation and demodulation of analogue signals was demonstrated using a proof-of-concept SDR application.

Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006. / A Synchronous Digital Hierarchy (SDH) point-to-point bi-directional link was implemented at a base Synchronous Transfer Mode level 1 (STM 1) signal rate. The full STM-1 multiplexer was implemented and the functional code developed to Virtual Container level 4 (VC4) level. The implementation was realized using a Software Defined Radio (SDR) architecture that managed and linked the SDH atomic units into a STM-1 SDH multiplexing structure. These atomic units have been well defined in recommendation G.707 [1]. The functional description of each unit was based on the G.783 [8] recommendation which specifies a library of basic building blocks and set of rules by which these atomic functions should be combined into various functional layers. These layers interconnect to ultimately form a bi-directional path in the SDH network. A SDH Management Sub network (SMS) was implemented using a graphical user interface to perform a monitoring function for the bi-directional link.

Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2009. / Due to ever evolving wireless communication standards and technologies, the need for more flexible radio terminals are becoming more sought after in order to adapt to these new standards. Software-defined radio offers a solution to this demand. Software-defined radio is a radio communication system where signal processing components that have typically been implemented in hardware are replaced by reconfigurable and re-useable software modules running on a digital processor. The need exists to rapidly create new SDR applications without designing an entire system from the ground up, and without specialised knowledge of the target platform. This thesis initially describes the design of a generic SDR architecture that is highly reconfigurable and promotes a high level of code re-use. The research forms part of a larger project to design a domain-specific language (DSL) in which to describe SDR functionality in a platform-independent way. In this thesis, the code synthesis from the DSL is extended to support the Freescale DSP563xx family.

Pour supporter l’évolution constante des standards de communication numérique, du GSM vers la 5G, les équipements de communication doivent continuellement s’adapter. Face à l’utilisation croissante de l’internet, on assiste à une explosion du trafic de données, ce qui augmente la consommation d'énergie des appareils de communication sans fil et conduit donc à un impact significatif sur les émissions mondiales de CO2. De plus en plus de recherches se sont concentrées sur l'efficacité énergétique de la communication sans fil. La radio Intelligente, ou Cognitive Radio (CR), est considérée comme une technologie pertinente pour les communications radio vertes en raison de sa capacité à adapter son comportement à son environnement. Sur la base de métriques fournissant suffisamment d'informations sur l'état de fonctionnement du système, une décision optimale peut être effectuée en vue d'une action de reconfiguration, dans le but de réduire au minimum la dissipation d'énergie tout en ne compromettant pas les performances. Par conséquent, tout équipement intelligent doit disposer d’une architecture de gestion de la reconfiguration. Nous avons retenu l’architecture HDCRAM (Hierarchical and Distributed Cognitive Radio Architecture Management), développée dans notre équipe, et nous l’avons déployée sur des plates-formes hétérogènes. L'un des objectifs est d'améliorer l'efficacité énergétique par la mise en œuvre de l’architecture HDCRAM. Nous l’avons appliquée à un système OFDM simplifié pour illustrer comment HDCRAM permet de gérer efficacement le système et son adaptation à un environnement évolutif. / As the digital communication systems evolve from GSM and now toward 5G, the supported standards are also growing. The desired communication equipments are required to support different standards in a single device at the same time. And more and more wireless Internet services have been being provided resulting in the explosive growth in data traffic, which increase the energy consumption of the communication devices thus leads to significant impact on global CO2 emission. More and more researches have focused on the energy efficiency of wireless communication. Cognitive Radio (CR) has been considered as an enabling technology for green radio communications due to its ability to adapt its behavior to the changing environment. In order to efficiently manage the sensing information and the reconfiguration of a cognitive equipment, it is essential, first of all, to gather the necessary metrics so as to provide enough information about the operating condition thus helping decision making. Then, on the basis of the metrics obtained, an optimal decision can be made and is followed by a reconfiguration action, whose aim is to minimize the power dissipation while not compromising on performance. Therefore, a management architecture is necessary to be added into the cognitive equipment acting as a glue to realize the CR capabilities. We introduce a management architecture, namely Hierarchical and Distributed Cognitive Radio Architecture Management (HDCRAM), which has been proposed for CR management by our team. This work focuses on the implementation of HDCRAM on heterogeneous platforms. One of the objectives is to improve the energy efficiency by the management of HDCRAM. And an example of a simplified OFDM system is used to explain how HDCRAM works to efficiently manage the system to adapt to the changing environment.

This diploma thesis focuses on the design and implementation of an emulator of RFID protocols in a software defined radio. The designed emulator operates in the UHF band (860 MHz – 960 MHz). The main goal of this design is a very fast measurement of power characteristic of tag. The proposed solution is based on implementing the transmitter controls directly into the SDR. Thanks to this solution a reduction of delay between measurements occur compared to the conventional concept, when the transmitter parameters are controlled by the hosted PC. In this thesis, suitable platform based on research is chosen for implementation and also a concept of design is proposed and described herein, which is based on implementation of time critical algorithms directlyinto the software defined radio’s FPGA. The proposed solution was implemented into selected platforms and its functionality was experimentally verified.

Le concept de Radio Logicielle propose d'intégrer en un seul circuit un émetteur / récepteur RF capable d'émettre et de recevoir n'importe quel signal RF. Cependant, ce concept doit affronter des contraintes technologiques dans le cas des terminaux mobiles. La contrainte principale est la consommation de puissance du terminal. En effet, la conversion analogique numérique qui est la clé de ce système en est aussi le principal verrou technique. Cette thèse présente une architecture de récepteur en rupture avec les architectures classiques afin de surmonter le problème de la conversion analogique numérique. Il s'agit d'un processeur analogique de traitement du signal dédié à la Radio Logicielle intégrale dans la gamme de fréquence 0 à 5GHz. Sa conception et les mesures d'un prototype sont présentées.

WCDMA promises to achieve high-speed internet, high quality image transmission and high-speed data services with larger system capacity. However, Multiple Access Interference is one of the major causes of transmission impairment, which reduces the link capacity in WCDMA systems. The Adaptive Antenna Array (AAA) technique reduces multiple access interference by directing antenna beam nulls towards the interfering signals by weighting the received signals from all antennas before combining the signals. With the very rapid advancement of wireless personal communications services, a new challenge to the cellular industry is the integration of multiple systems and applications on a single device. A software radio technique offers a possible solution to achieve this goal including international roaming and multiple standard operations within the same geographical area. The main attraction of a software radio is it's flexibility, in that it can be programmed for emerging cellular standards allowing it to be updated with new software without any changes in the hardware infrastructure. A software radio incorporating adaptive array beamforming at the receiver can increase the total carried traffic in a system and transmit power while the probability of call blocking and forced termination can also be decreased. This dissertation examines WCDMA, AAA, power control and software radio techniques in the world of wireless communication systems. Once the theoretical background of CDMA and AAA has been substantiated, the thesis establishes the need for power control in mobile systems by examining simulation results. An AAA receiver with six antenna elements is proposed and evaluated in different environments as a precursor to implementation. It can be inferred that when the link is interference limited, the link capacity can be increased and it has been shown that the AAA receiver with six antenna elements increases the link capacity to about 2.9 times that of the single antenna RAKE receiver. This thesis also examines the basic concepts of VHDL and considers this as the principle means to program reconfigurable core FPGA's in the software radio. A three-layered (PC/DSP/FPGA) software radio test bed is used to implement an AAA receiver. The architecture of the test bed is designed in such a way that it can be used to evaluate the performance of various FPGA based transceivers and coding schemes etc. Many of the desirable features and flexibilities inherent in the software radio concept are available on this test bed and the system has proved to be capable of high speed digital processing and is ideally suited to the development of time critical system components. The bit error rate achieved using the implemented receiver is assessed and compared to simulation results in an environment incorporating Rayleigh fading and AWGN. / Thesis (M.Sc.Eng.)-University of Natal, Durban, 2001.

Η παρούσα διπλωματική εργασία αφορά στην πειραματική αξιολόγηση του μηχανισμού ανάκτησης ρυθμού συμβόλου για ψηφιακούς δέκτες τεχνολογίας SDR που λαμβάνουν δεδομένα μέσω δορυφόρου. Η ορολογία SDR/SR (Software Defined Radio/Software Radio) χρησιμοποιείται για να χαρακτηρίσει τους πομποδέκτες που μπορούν να καθορίζουν σημαντικές παραμέτρους τους και βασικές αρχές της λειτουργίας τους μέσω αναβάθμισης ή ενημέρωσης του λογισμικού τους. Ο μηχανισμός ανάκτησης του ρυθμού συμβόλου (Symbol Timing Recovery, STR) αναπτύχθηκε στα πλαίσια της διδακτορικής διατριβής του διδάκτορος Παναγιώτη Σαββόπουλου. Η παρούσα εργασία μελετά τη σύγκλιση του βρόχου υπό συνθήκες παραμένοντος σφάλματος συχνότητας καθώς επίσης και τον προσδιορισμό του λόγου σήματος προς θόρυβο στην έξοδο του βρόχου κάνοντας χρήση ενός νέου μεγέθους, metric, το οποίο έχει εισαχθεί στα πλαίσια της προαναφερθείσας διδακτορικής διατριβής, υπό συνθήκες λευκού Gaussian θορύβου. Το μέγεθος αυτό είναι σε θέση να δώσει αξιόπιστα αποτελέσματα στις ενδιάμεσες υπομονάδες του δέκτη υπό συνθήκες παραμένοντος σφάλματος συχνότητας. Στην παρούσα εργασία μελετώνται οι QPSK, 8PSK, 16-APSK και 32-APSK διαμορφώσεις διότι αυτές οι διαμορφώσεις χρησιμοποιούνται από το πρότυπο DVB-S2. / The purpose of this project is the experimental evaluation of a mechanism for the symbol timing recovery which is used in digital Software Defined Radio receivers. SDR/SR (Software Defined Radio/Software Radio) technology is used to characterise the transmitters and the receivers which are able to determine important parameters and basic primciples for their function through upgrade or briefing of their software. The symbol timing recovery mechanism (STR) was developped in terms of the doctora of dr Panagiotis Savopoylos. The precent project examines the loop’s convergence when there is frequency error as well as the signal to noise ratio in the output of STR with the use of a new size, metric, which was also developped in terms of the doctora which was mentioned before, when there is white Gaussian noise. The metric is able to give reliable results in the intermediate stages of the receiver when there is frequency error. In the precent project are examined the QPSK, 8PSK,16-APSK, 32-APSK modulations because these modulations are used in DVB-S2 standard.

Thesis (MScEng)--Stellenbosch University, 2014. / ENGLISH ABSTRACT: In this thesis the design and testing of the baseband components of a modem intended for use as a telemetry and control link for a low earth orbit satellite is presented. This includes parts of the physical layer as well as a basic data-link layer. Binary phase-shift keying (BPSK) is used as the modulation scheme and is realised by making use of software defined radio on a standard x86 computer with digital to analogue and analogue to digital converters that use a universal serial bus (USB) connection. The data-link layer makes use of a basic framing scheme and provides bit synchronisation, an automatic repeat request (ARQ) system and Bose Chaudhuri Hocquenghem (BCH) forward error correction (FEC). The ARQ system ensures that data is delivered reliably and the FEC improves the system’s performance in noisy conditions. A prototype system was developed to test the performance of the individual layers as well as the system as a whole. For testing purposes the Linux Internet Protocol (IP) stack is used as higher network layers. Radio frequency hardware developed by Verschaeve [1] modulates the signal away from baseband, transmits it over the air and receives it. / AFRIKAANSE OPSOMMING: In hierdie tesis word die ontwerp en toetsing van die basisband komponente van ‘n modem, bedoel vir gebruik op ‘n satelliet in ‘n lae-aarde wentelbaan, bespreek. Die ontwerp sluit dele van die fisiese vlak sowel as ‘n verbindingsvlak in. Binêre faseskuifsleuteling word gebruik as die modulasieskema en word verwesenlik deur gebruik te maak van sagteware gedefinieerde radio. Dit voer uit op ’n standaard x86 rekenaar wat deur middel van USB gekoppel is aan ’n digitaal-na-analoog- en ’n analoog-na-digitaal-omsetter. Die verbindingsvlak het ‘n eenvoudige ramingskema. Dit voorsien bis sinkronisasie, die hersending van verlore rame en Bose Chaudhuri Hocquenghem (BCH) voorwaartse foutverbetering. Die hersending van verlore rame verseker dat data betroubaar oorgedra kan word en foutverbetering verbeter die stelsel se vermoëns in ruiserige toestande. ‘n Prototipe stelsel is ontwikkel om die vermoëns van die individuele vlakke, sowel as die stelsel as ’n geheel, te toets. Tydens toetsing is die Linux Internet Protokol stapel gebruik vir die hoër netwerk vlakke. Radio komponente wat deur Verschaeve [1] ontwikkel was is gebruik om die sein uit te saai en te ontvang.