Thesis (Ph.D) - Swinburne University of Technology, Faculty of Information & Communication Technologies, 2006. / A thesis submitted for the degree of Doctor of Philosophy, Faculty of Information and Communication Technologies, Swinburne University of Technology, 2006. Typescript. Bibliography p. ?? Includes bibliographical references (p. 135-142).

Thesis(M.S.)--Auburn University, 2005. / Abstract. Vita. Includes bibliographic references (p.68-73).

Thesis (Ph. D.)--Ruhr Universität Bochum, 1983. / Vita.

Thesis (Ph. D.)--University of Wisconsin--Madison, 1967. / Typescript. Vita. Description based on print version record. Includes bibliographical references (leaves 130-133).

[by] A.K. Susskind, D.R. Haring [and] C.L. Liu. / Includes bibliographies. / "AD 657370."

No description available.

No description available.

A single user deconcentrator is designed for a circuit switched digital switching system which emphasizes mass conferencing. The switching system consists of distributed concentrators which include a first level of conferencing and a broadcast bus which includes a second level of conferencing. The deconcentrator features volume adjustment of individual conferences as well as a third and last level of conferencing- a conference of the individual conferences obtained from the broadcast bus. The design identifies the MSI and SSI components of the deconcentrator and provides an estimate of timing and board size. An alternative volume adjustment algorithm and the extension of a single user deconcentrator to a multi-user deconcentrator is discussed.

This paper architecturally describes the switching portion of a digital communications system that is dedicated to conferencing. The basic ideas and methods of circuit switching and packet switching are introduced. The conferencing function is described, and some resulting design considerations are discussed. The architecture of the switch is then presented. Circuit switching techniques are used throughout the architecture of the switch, coupled with arithmetic processing to accomplish the conferencing function. The architecture is developed in such a way that it is expandable in all directions to meet a given set of requirements. The requirements include the number of users the system supports and the number of conference channels provided. The processing stages of the switch can be sized based on these requirements and the chosen component speeds. The basic timing of each stage is given to describe its operation and establish the critical delay paths. The resulting switching methods first introduced. The switch is also tested to see if it fits the criteria for being a distributed processing system. It is concluded that if the provision for dynamic reconfiguration is added, the switch fits the criteria. Finally, further topics of study are suggested.

In the last two decades there has been a revival of interest in variable reluctance drives mainly due to the advent of high power semiconductor devices and improvements in the understanding of the principles of electromagnetic energy conversion. In particular, the switched reluctance motor (SRM) has received attention mainly due to its simple construction and robustness when compared to other variable-speed drives. Considerable research has been done on topics ranging from the design to the control of the motor. Due to the high nonlinearity of the machine, even the prediction of the steady-state performance of the drive has been difficult. In the attempt to overcome the nonlinearity problem, researchers have resorted to computer solutions. The Finite Element Analysis (FEA) method has been used to predict the steady state performance of the motor. While this has improved the accuracy of performance prediction, it is very time intensive. This is unacceptable in an industrial situation where the PC is the main design tool. The need for analytical methods therefore exists. An analytical method for the steady-state performance prediction of the SRM drive based on an improved method for estimating the maximum and minimum inductances is described. This method is extended to include determination of the motor inductances at any rotor position and subsequently, the prediction of the steady-state average torque. The work also proposes an analytical method for determining the core losses of the SRM. Considerable effort is also dedicated to the design and analysis of new and old SRM converter topologies with particular attention to the criteria governing the choice of converter topology, the prediction of key waveforms, the criteria for selecting power semiconductor devices and the determination of device ratings. A novel method for the direct steady-state analysis of the SRM drive without going through the transient solution is proposed. The effect of motor geometry on converter ratings is also investigated for the common SRM pole combinations. Novel methods for the measurement and instrumentation of SRM are also described. Theoretical predictions are verified by experimental results using a 6/4 pole prototype switched reluctance motor. / Ph. D.