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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
51

Analog-digital converter : strip chart to punched card.

Michalski, Joseph Eugene. January 1971 (has links)
No description available.
52

Design of Switching Strategy for Adaptive Cruise Control Under String Stability Constraints

Zhai, Yao January 2010 (has links)
Indiana University-Purdue University Indianapolis (IUPUI) / An Adaptive Cruise Control (ACC) system is a driver assistance system that assists a driver to improve driving safety and driving comfort. The design of ACC controller often involves the design of a switching logic that decides where and when to switch between the two modes in order to ameliorate driving comfort, mitigate the chance of a potential collision with the preceding vehicle while reduce long-distance driving load from the driver. In this thesis, a new strategy for designing ACC controller is proposed. The proposed control strategy utilizes Range vs. Range-rate chart to illustrate the relationship between headway distance and velocity difference, and then find out a constant deceleration trajectory on the chart, which the following vehicle is controlled to follow. This control strategy has a shorter elapsed time than existing ones while still maintaining a relatively safe distance during transient process. String stability issue has been addressed by many researchers after the adaptive cruise control (ACC) concept was developed. The main problem is when many vehicles with ACC controller forming a vehicle platoon end to end, how the control algorithm is designed to ensure that the spacing error, which is the deviation of the actual range from the desired headway distance, would not amplify as the number of following vehicles increases downstream along the platoon. In this thesis, string stability issues have been taken into consideration and constraints of parameters of an ACC controller are derived to mitigate steady state error propagation.
53

Application of two complementary sequencing rules to control the job shop by switching

Tellez, Ruben B. January 1982 (has links)
This research presents two switching techniques using SOT and SLACK, as complementary sequencing rules, to show that they are practical procedures to control a job shop. These two approaches are: Static switching of the complementary rules. Dynamic switching of the complementary rules. This study also presents questions which arise in creating different switching rules or procedures for an interactive scheduling system. It is also developed a normalized objective function to measure the balance of the best properties produced by SOT (low flow time) and SLACK (low tardiness). It should be noted that even though such a system could be viewed as complex and expensive,it is not. Computational requirement will be slightly increased, but no more data is required than is expected for a typical scheduling procedure. Finally, a procedure to calculate the upper and lower limits is presented for dynamic switching procedures. / Master of Science
54

Analysis and optimisation of stable matching in combined input and output queued switches

Schweizer, Andreas January 2009 (has links)
Output queues in network switches are known to provide a suitable architecture for scheduling disciplines that need to provide quality of service (QoS) guarantees. However, today’s memory technology is incapable of meeting the speed requirements. Combined input and output queued (CIOQ) switches have emerged as one alternative to address the problem of memory speed. When a switch of this architecture uses a stable matching algorithm to transfer packets across the switch fabric, an output queued (OQ) switch can be mimicked exactly with a speedup of only two. The use of a stable matching algorithm typically requires complex and time-consuming calculations to ensure the behaviour of an OQ switch is maintained. Stable matching algorithms are well studied in the area in which they originally appeared. However, little is presently known on how the stable matching algorithm performs in CIOQ switches and how key parameters are affected by switch size, traffic type and traffic load. Knowledge of how these conditions affect performance is essential to judge the practicability of an architecture and to provide useful information on how to design such switches. Until now, CIOQ switches were likely to be dismissed due to the high complexity of the stable matching algorithm when applied to other applications. However, the characteristics of a stable matching algorithm in a CIOQ switch have not been thoroughly analysed. The principal goal of this thesis is to identify the conditions the stable matching algorithm encounters in a CIOQ switch under realistic operational scenarios. This thesis provides accurate mathematical models based on Markov chains to predict the value of key parameters that affect the complexity and runtime of a stable matching algorithm in CIOQ switches. The applicability of the models is then backed up by simulations. The results of the analysis quantify critical operational parameters, such as the size and number of preference lists and runtime complexity. These provide detailed insights into switch behaviour and useful information for switch designs. Major conclusions to be drawn from this analysis include that the average values of the key parameters of the stable matching algorithm are feasibly small and do not strongly correlate with switch size, which is contrary to the behaviour of the stable matching ii algorithm in its original application. Furthermore, although these parameters have wide theoretical ranges, the mean values and standard deviations are found to be small under operational conditions. The results also suggest that the implementation becomes very versatile as the completion time of the stable matching algorithm is not strongly correlated to the network traffic type; that is, the runtime is minimally affected by the nature of the traffic.
55

Variable speed constant frequency power conversion with permanent magnet synchronous and switched reluctance generators

Rim, Geun-hie 20 October 2005 (has links)
Power electronics is inevitably concerned with the processing of variable speed power generations such as in wind turbines, aircraft systems and naval on-board ship systems. The nature of these types of energy is distinct in that their frequency and power vary depending on the speed of the prime-mover. To make use of the variable speed energy, a power processing scheme which transforms the variable speed energy into a constant frequency power is required. There are measures such as mechanical and electrical links for such purposes. Electrical link systems are chosen in this study due to their fast responses and high reliabilities. The power conversion stage may be a dc link with a line-commutated converter, a dc link with a self-commutated inverter, or a cycloconverter. The line-commutated converter and cycloconverter power stages require a fixed frequency supply for operation whereas the self-commutated inverter is capable of stand-alone operation, thus making it attractive. Two cases of variable speed power generation using a permanent magnet synchronous machine (hereafter referred to as PMSM) and a switched reluctance machine (hereafter referred to as SRM) were studied in this dissertation. The possible use of PMSMs has been proved by the good correlation between the experimental results and the theoretically predicted results. Three different control strategies have been proposed, implemented in hardware, and experimentally verified. The efficiency of the VSCF power conversion with a self commutated converter were comparable to the one using a line-commutated converter. A novel converter topology with no dc link capacitor has been proposed for the application of SRMs to the VSCF power conversion. The proposed topology directly links the constant frequency ac source to the SRM. This feature enhances the reliability of the power conversion scheme and reduces the weight and volume of the system. The correlation between the theoretical and experimental results of some key issues showed the feasibility of the proposed VSCF power conversion scheme. In the course of the study, one stage ac to dc power conversion with a compact transformer was required for dc loads. However, phase-controlled ac to dc conversion has the disadvantages of low power factor and harmonic pollution on the utility side, particularly in the case where dc voltage regulation is required. Therefore, a novel single phase rectifier for dc load which provides ohmic isolation with a high frequency transformer is extensively investigated. The proposed scheme had a wide output variation on dc output while maintaining unity power factor and sinusoidal current in the ac input side. Three control strategies for the operation of the converter were proposed and verified experimentally. The harmonic spectra on ac and dc sides are analytically derived and experimentally proved under some load conditions. / Ph. D.
56

Securing softswitches from malicious attacks

Opie, Jake Weyman January 2007 (has links)
Traditionally, real-time communication, such as voice calls, has run on separate, closed networks. Of all the limitations that these networks had, the ability of malicious attacks to cripple communication was not a crucial one. This situation has changed radically now that real-time communication and data have merged to share the same network. The objective of this project is to investigate the securing of softswitches with functionality similar to Private Branch Exchanges (PBX) from malicious attacks. The focus of the project will be a practical investigation of how to secure ILANGA, an ASTERISK-based system under development at Rhodes University. The practical investigation that focuses on ILANGA is based on performing six varied experiments on the different components of ILANGA. Before the six experiments are performed, basic preliminary security measures and the restrictions placed on the access to the database are discussed. The outcomes of these experiments are discussed and the precise reasons why these attacks were either successful or unsuccessful are given. Suggestions of a theoretical nature on how to defend against the successful attacks are also presented.
57

OpenFlow based load balancing and proposed theory for integration in VoIP network

Pandita, Shreya 21 May 2014 (has links)
Indiana University-Purdue University Indianapolis (IUPUI) / In today's internet world with such a high traffic, it becomes inevitable to have multiple servers representing a single logical server to share enormous load. A very common network configuration consists of multiple servers behind a load balancer. The load balancer determines which server would service a clients request or incoming load from the client. Such a hardware is expensive, runs a fixed policy or algorithm and is a single point of failure. In this paper, we will implement and analyze an alternative load balancing architecture using OpenFlow. This architecture acquires flexibility in policy, costs less and has the potential to be more robust. This paper also discusses potential usage of OpenFlow based load balancing for media gateway selection in SIP-PSTN networks to improve VoIP performance.
58

A non-conventional multilevel flying-capacitor converter topology

Gulpinar, Feyzullah January 2014 (has links)
Indiana University-Purdue University Indianapolis (IUPUI) / This research proposes state-of-the-art multilevel converter topologies and their modulation strategies, the implementation of a conventional flying-capacitor converter topology up to four-level, and a new four-level flying-capacitor H-Bridge converter confi guration. The three phase version of this proposed four-level flying-capacitor H-Bridge converter is given as well in this study. The highlighted advantages of the proposed converter are as following: (1) the same blocking voltage for all switches employed in the con figuration, (2) no capacitor midpoint connection is needed, (3) reduced number of passive elements as compared to the conventional solution, (4) reduced total dc source value by comparison with the conventional topology. The proposed four-level capacitor-clamped H-Bridge converter can be utilized as a multilevel inverter application in an electri fied railway system, or in hybrid electric vehicles. In addition to the implementation of the proposed topology in this research, its experimental setup has been designed to validate the simulation results of the given converter topologies.

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