La verificación de los sistemas digitales se ha vuelto una etapa crucial en el proceso de desarrollar un System on Chip (SoC). El esfuerzo que se debe de hacer en esta etapa es sustancial respecto de otras. Debido a esto se ha optado por incrementar los niveles de abstracción al momento de diseñar/verificar un sistema digital. En esta tesis se estudiará uno de estos niveles, TLM o Transaction Level Modelling, se presentar a su concepci on, sus ventajas y desventajas, con el n de poder diseñar un sistema de mediana complejidad atravesando varios niveles de abstracción. Se utilizarán métodos basados en simulación y métodos formales para verificar algunos de estos niveles. La tesis se centra como se dijo anteriormente en TLM, dándole un enfoque principal a la transacción como unidad atomica de transferencia de datos en un diseño. En el primer capítulo se hace una introducción a la problem atica/motivación, en el segundo capítulo se realiza un revelamiento del estado actual de la problem atica, el tercero introduce una breve introducción a TLM y su implementación en SystemC, el cuarto presenta la metodología propuesta para afrontar la problem atica. En el quinto capítulo se comenta cómo se realizó la implementación de la metodología. En el sexto capítulo se describen los resultados obtenidos. Mientras que el ultimo capítulo se realizar a una revisión de los resultados obtenidos, enumerándose los objetivos alcanzados y el trabajo a futuro en el area. La utilización de una metodología Top-Down facilito la generación de las correspondientes abstracciones del sistema (niveles) a fin de comprender sus problem aticas particulares. Se abordo la verificación tanto de bloques propios como bloques desarrollados por terceros, apreciando las características de los distintos enfoques de verificación según el caso. La inserción de los métodos formales como una herramienta adicional al flujo propuesto ha demostrado un aporte significativo al momento de realizar la verificación. La utilización de distintos lenguajes de descripción de hardware evidenci o las ventajas y desventajas de cada uno, análogamente se logró apreciar las ventajas y desventajas del entorno de verificación en comparación con entornos de verificación generados por otras metodologías ya establecidas. Por ultimo, se apreció el beneficio de la simulaci on mixta SystemC-Verilog o SystemC-VHDL, ganando una experiencia en el manejo de distintos lenguajes de HDL con el fin de generar conocimiento respecto de cuando debe de utilizarse o de que manera se debe utilizar los distintos lenguajes.

Network-on-Chip (NOC) based designs have garnered significant attention from both researchers and industry over the past several years. The analysis of these designs has focused on broad topics such as NOC component micro-architecture, fault-tolerant communication, and system memory architecture. Nonetheless, the design of lowlatency, high-bandwidth, low-power and area-efficient NOC is extremely complex due to the conflicting nature of these design objectives. Benchmarks are an indispensable tool in the design process; providing thorough measurement and fair comparison between designs in order to achieve optimal results (i.e performance, cost, quality of service). This research proposes a benchmarking platform called NoCBench for evaluating the performance of Network-on-chip. Although previous research has proposed standard guidelines to develop benchmarks for Network-on-Chip, this work moves forward and proposes a System-C based simulation platform for system-level design exploration. It will provide an initial set of synthetic benchmarks for on-chip network interconnection validation along with an initial set of standardized processing cores, NOC components, and system-wide services. The benchmarks were constructed using synthetic applications described by Task Graphs For Free (TGFF) task graphs extracted from the E3S benchmark suite. Two benchmarks were used for characterization: Consumer and Networking. They are characterized based on throughput and latency. Case studies show how they can be used to evaluate metrics beyond throughput and latency (i.e. traffic distribution). The contribution of this work is two-fold: 1) This study provides a methodology for benchmark creation and characterization using NoCBench that evaluates important metrics in NOC design (i.e. end-to-end packet delay, throughput). 2) The developed full-system simulation platform provides a complete environment for further benchmark characterization on NOC based MpSoC as well as system-level design space exploration.

Le réseau sans fil sur le corps humain ou « wireless body area network (WBAN) » est une nouvelle technologie de réseau sans fil dédié à la surveillance des paramètres physiologiques d’une personne. Le réseau est composé de dispositifs électroniques miniatures, appelés nœuds, disposés aux alentours ou à l’intérieur du corps humain. Chaque nœud est doté d’un ou plusieurs capteurs mesurant les paramètres physiologiques de la personne, comme l’électrocardiogramme ou bien la température du corps, et les caractéristiques de l’environnement qui l’entoure. Ces nœuds sont surtout soumis à une contrainte énergétique importante puisque la miniaturisation a réduit les dimensions de leurs batteries. Puisque les nœuds consomment la majorité de l’énergie pour transmettre les données, une solution pour diminuer leur consommation consisterait à compresser les données avant la transmission. Les méthodes classiques de compression ne sont pas adaptées pour le WBAN particulièrement à cause de la puissance de calcul requise et la consommation qui en résulterait. Dans cette thèse, pour contourner ces problèmes, nous utilisons une méthode à base de l’acquisition comprimée pour compresser et reconstruire les données provenant des nœuds. Nous proposons un encodeur simple et facile à mettre en œuvre pour compresser les signaux. Nous présentons aussi un algorithme permettant de réduire la complexité de la phase de reconstruction des signaux. Un travail collaboratif avec l’entreprise TEA (Technologie Ergonomie Appliquées) nous a permis de valider expérimentalement une version numérique de l’encodeur et l’algorithme de reconstruction. Nous avons aussi développé et validé une version analogique de l’encodeur en utilisant des composants standards. / A wireless body area network (WBAN) is a new class of wireless networks dedicated to monitor human physiological parameters. It consists of small electronic devices, also called nodes, attached to or implanted in the human body. Each node comprises one or many sensors which measure physiological signals, such as electrocardiogram or body heat, and the characteristics of the surrounding environment. These nodes are mainly subject to a significant energy constraint due to the fact that the miniaturization has reduced the size of their batteries. A solution to minimize the energy consumption would be to compress the sensed data before wirelessly transmitting them. Indeed, research has shown that most of the available energy are consumed by the wireless transmitter. Conventional compression methods are not suitable for WBANs because they involve a high computational power and increase the energy consumption. To overcome these limitations, we use compressed sensing (CS) to compress and recover the sensed data. We propose a simple and efficient encoder to compress the data. We also introduce a new algorithm to reduce the complexity of the recovery process. A partnership with TEA (Technologie Ergonomie Appliquées) company allowed us to experimentally evaluate the performance of the proposed method during which a numeric version of the encoder has been used. We also developed and validated an analog version of the encoder.

Thesis (Ph.D.)--Hong Kong University of Science and Technology, 2004. / Includes bibliographical references (leaves 212-224). Also available in electronic version. Access restricted to campus users.

<p>This thesis describes the design and implementation of a Digital Audio Broadcasting (DAB) System developed using C++ Language and SystemC libraries. The main aspects covered within this report are the data structure of DAB system, and some interesting points of SystemC Library very useful for the implementation of the final system. </p><p>It starts with a introduction of DAB system and his principals advantages. Next it goes further into the definition of data structures of DAB, they are FIC, MSC, and DAB audio frame, explained with MPEG and PAD packets. Later on this chapter there is an explanation of the SystemC library with special attention on the features that I used to implement the system. This features are the events used in the communication between processes and the interfaces needed for sending and receiving the data.</p><p>With all these points covered is quite easy for a reader to understand the implementation of the system, despite this point is covered in the last chapter of the thesis. The implementation is here explained in two different steps. The first one explain how is formed the DAB audio frame by means of MPEG frames that are wrote in channel by producer interface, this frames are readed by consumer interface. For this purpose I have created some classes and structures that are explained in this part. The second part explain how I obtain the DAB transmission frame which is obtained creating MSC frames, that are big data structures formed by groups of DAB audio frames, therefore there are some functions that act like a buffer and add audio frames to the MSC data structure. Of independent way there is the FIC frame that is generated of random way and its added to the transmission frame.</p>

This thesis describes the design and implementation of a Digital Audio Broadcasting (DAB) System developed using C++ Language and SystemC libraries. The main aspects covered within this report are the data structure of DAB system, and some interesting points of SystemC Library very useful for the implementation of the final system. It starts with a introduction of DAB system and his principals advantages. Next it goes further into the definition of data structures of DAB, they are FIC, MSC, and DAB audio frame, explained with MPEG and PAD packets. Later on this chapter there is an explanation of the SystemC library with special attention on the features that I used to implement the system. This features are the events used in the communication between processes and the interfaces needed for sending and receiving the data. With all these points covered is quite easy for a reader to understand the implementation of the system, despite this point is covered in the last chapter of the thesis. The implementation is here explained in two different steps. The first one explain how is formed the DAB audio frame by means of MPEG frames that are wrote in channel by producer interface, this frames are readed by consumer interface. For this purpose I have created some classes and structures that are explained in this part. The second part explain how I obtain the DAB transmission frame which is obtained creating MSC frames, that are big data structures formed by groups of DAB audio frames, therefore there are some functions that act like a buffer and add audio frames to the MSC data structure. Of independent way there is the FIC frame that is generated of random way and its added to the transmission frame.

The purpose of this diploma thesis was to explore possibilities, design and build 2D position system driven by PC via USB. ATmega16 and FT232R were used as the most important parts of hardware solution. Software for control of the position system was designed in C++ Builder and it can run under MS Windows XP. This work is based on semestral thesis and in future can be used in other applications or modified. 2D position system will be later used by UBMI in education and scientific applications.

Les grandes évolutions de la technique de systèmes embarqués au cours des dernières années ont permis avec succès la combinaison de la détection, le traitement des données, et diverses technologies de communication sans fil tout en un nœud. Les réseaux de capteurs sans fil (WSN) qui se composent d'un grand nombre de ces nœuds ont attiré l'attention du monde entier sur les établissements scolaires et les communautés industrielles, puisque leurs applications sont très répandues dans des domaines tels que la surveillance de l'environnement, le domaine militaire, le suivi des événements et la détection des catastrophes. En raison de la dépendance sur la batterie, la consommation d'énergie des réseaux de capteurs a toujours été la préoccupation la plus importante. Dans cet article, une méthode mixte est utilisée pour l'évaluation précise de l'énergie sur les réseaux de capteurs, ce qui inclut la conception d'un environnement de SystemC simulation base au niveau du système et au niveau des transactions pour l'exploration de l'énergie, et la construction d'une plate-forme de mesure d'énergie pour les mesures de nœud banc d'essai dans le monde réel pour calibrer et valider à la fois le modèle de simulation énergétique de nœud et le modèle de fonctionnement. La consommation d'énergie élaborée de plusieurs différents réseaux basés sur la plate-forme de nœud sont étudiées et comparées dans différents types de scénarios, et puis des stratégies globales d'économie d'énergie sont également données après chaque scénario pour les développeurs et les chercheurs qui se concentrent sur la conception des réseaux de capteurs efficacité énergétique. Un cadre de l'optimisation basée sur un algorithme génétique est conçu et mis en œuvre à l'aide de MATLAB pour les réseaux de capteurs conscients de l'énergie. En raison de la propriété de recherche global des algorithmes génétiques, le cadre de l'optimisation peut automatiquement et intelligemment régler des centaines de solutions possibles pour trouver le compromis le plus approprié entre la consommation d'énergie et d'autres indicateurs de performance. Haute efficacité et la fiabilité du cadre de la recherche des solutions de compromis entre l'énergie de nœud, la perte de paquets réseau et la latence ont été prouvés par réglage paramètres de l'algorithme CSMA / CA de unslotted (le mode non-beacon de IEEE 802.15.4) dans notre simulation basé sur SystemC via une fonction de coût de la somme pondérée. En outre, le cadre est également disponible pour la tâche d'optimisation basée sur multi-scénarios et multi-objectif par l'étude d'une application médicale typique sur le corps humain.

New cooperative intelligent transportation system (C-ITS) applications become enabled thanks to advances in communication technologies between vehicles(V2V) and with the infrastructure (V2I). Communicating vehicles share information with each other and cooperate, which results in improved safety, fuel economy, and traffic efficiency. An example of a C-ITS application is platooning, which comprises a string of vehicles that travel together with short inter-vehicle distances (IVDs). Any solution related to C-ITS must comply with high safety requirements in order to pass standardization and be commercially deployed. Furthermore, trusted safety levels should be assured even for critical scenarios. This thesis studies the conditions that guarantee safety in emergency braking scenarios for heterogeneous platooning, or string-like, formations of vehicles. In such scenarios, the vehicle at the head of the string emergency brakes and all following vehicles have to automatically react in time to avoid rear-end collisions. The reaction time can be significantly decreased with vehicle-to-vehicle (V2V) communication usage since the leader can explicitly inform other platooning members about the critical braking. The safety analysis conducted in the thesis yields computationally efficient methods and algorithms for calculating minimum inter-vehicle distances that allow avoiding rear-end collisions with a predefined high guarantee. These IVDs are theoretically obtained for an open-loop and a closed-loop configurations. The former implies that follower drives with a constant velocity until braking starts, whereas in the latter, an adaptive cruise control (ACC) with a constant-distance policy serves as a controller. In addition, further optimization of inter-vehicle distances in the platoon is carried out under an assumption of centralized control. Such an approach allows achieving better fuel consumption and road utilization. The performed analytical comparison suggests that our proposed V2V communication based solution is superior to classical automated systems, such as automatic emergency braking system (AEBS), which utilizes only onboard sensors and no communication. Wireless communication, enabling to know the intentions of other vehicles almost immediately, allows for smaller IVDs whilst guaranteeing the same level of safety. Overall, the presented thesis highlights the importance of C-ITS and, specifically, V2V in the prevention of rear-end collisions in emergency scenarios. Future work directions include an extension of the obtained results by considering more advanced models of vehicles, environment, and communication settings; and applying the proposed algorithms of safety guaranteeing to other controllers, such as ACC with a constant time headway policy.

This master's thesis with the usage of the system for the content managing - the DotNetNuke system as an editorial system. It describes all options and features of the DotNetNuke system. On its basis of the system's features there have been made proposals for extensions which, when implemented, will let the DotNetNuke system to be used as full-value editorial system.