System on Chip (SoC) and System in Package (SiP) are two electronic technologies that involve integrating multiple functionalities onto a single platform. When the platform is a single wafer, as in SOC, it requires the ability to deposit various materials that enable the different functions on to an underlying substrate that can host the electronic circuitry. Transition metal oxides which have a wide range of properties are ideal candidates for the functional material. Si wafer on which micro-electronics technology is widely commercialized is the ideal host platform. Integrating oxides with Si, generally in the form of thin films as required by microelectronics technology, is however a challenge. It starts with the fact that the properties of crystalline oxides to be exploited in performing various functions are direction dependent. Thus, thin films of these oxides need to be deposited on Si in certain crystallographic orientations. Even if a suitably oriented Si wafer surface were available, it does not always provide for epitaxial growth a critical requirement for controlling the crystalline orientation of thin films. This is because Si surface is covered by an amorphous oxide of Si (SiOx). Thus, during growth of the functional oxide, an ambience in which the Si itself will not oxidize needs to be provided. In addition, during thin film growth on either Si or SiOx surface stresses are generated from various sources. Stress and its relaxation are also associated with the formation and evolution of defects. Both, stress and defects need to be managed in order to harness their beneficial effects and prevent detrimental ones. Given the requirement of SoC technology and the problem associated, the research work reported in this thesis was hence concerned with the precise controlling the stress and microstructure in oxide thin films deposited on Si substrates. In order to do so a versatile, ultra high vacuum (UHV) thin film with a base pressure of 10-9 Torr was designed and built as part of this study. The chamber is capable of depositing films by both sputtering (RF & DC) and pulsed laser ablation (PLD). The system has been designed to include an optical curvature measurement tool that enabled real-time stress measurement during growth. Doped zirconia, ZrO2, was chosen as the first oxide to be deposited, as it is among the few oxides that is more stable than SiOx. It is hence used as a buffer layer. It is shown in this thesis that a change in the growth rate at nucleation can lead to (100) or (111) textured films. These two are among the most commonly preferred orientation. Following nucleation a change in growth rate does not affect orientation but affects stress. Thus, independent selection of texture and stress is demonstrated in YSZ thin films on Si. A quantitative model based on the adatom motion on the growth surface and the anisotropic growth rates of the two orientations is used to explain these observations. This study was then subsequent extended to the growth on platinized Si another commonly used Si platform.. A knowledge of the stress and microstructure tailoring in cubic zirconia on Si was then extended to look at the effect of stress on electrical properties of zirconia on germanium for high-k dielectric applications. Ge channels are expected to play a key role in next generation n-MOS technology. Development of high-k dielectrics for channel control is hence essential. Interesting stress and property relations were analyzed in ZrO2/Ge. Stress and texture in pulsed laser deposited (PLD) oxides on silicon and SrTiO3 were studied. It is shown in this thesis that stress tuning is critical to achieve the highest possible dielectric constant. The effect of stress on dielectric constant is due to two reasons. The first one is an indirect effect involving the effect of stress on phase stability. The second one is the direct effect involving interatomic distance. By stress control an equivalent oxide thickness (EOT) of 0.8 nm was achieved in sputter deposited ZrO2/Ge films at 5 nm thickness. This is among the best reported till date. Finally, the effect of growth parameters and deposition geometry on the microstructural and stress evolution during deposition of SrTiO3 on Si and BaTiO3 on SrTiO3 by pulsed laser deposition is the same chamber is described.

Ce projet de thèse se situe dans le cadre de l'étude de la fiabilité prédictive de nouveaux concepts d'assemblages microélectroniques de type « system in package » SiP. L'objectif est de développer une méthodologie de fiabilité prédictive adaptée aux nouveaux concepts d'assemblage qui permet d'optimiser et de prédire les performances dès la phase de conception. Elle est ensuite appliquée sur des projets concrets. Cette méthodologie de fiabilité prédictive fait intervenir des études expérimentales, des simulations thermomécaniques et des analyses statistiques pour traiter les données et évaluer la fiabilité et les risques de défaillance. L'utilisation d'outils de simulation des composants électroniques est bien adaptée pour aider à l'évaluation des zones les plus fragiles, la mise en place des règles de conception et la détermination des paramètres les plus influents avec une réduction du temps de mise en marché d'un produit fiable et une optimisation des performances. Les études réalisées sur le silicium avec deux tests : bille sur anneau et test trois points montrent que le rodage et l'épaisseur ont une influence sur la variation de la contrainte et la déflexion du silicium à la rupture. Avec le test trois points, le déclenchement des fissures est lié à la qualité de sciage et de rodage. Cependant avec le test bille sur anneau, seule la qualité de surface influence le déclenchement des fissures. Le test bille sur anneau est bien adapté pour évaluer la qualité de surface du silicium. Avec les techniques chimiques de réduction de contraintes, comme la gravure humide et plasma, la résistance à la rupture a été considérablement améliorée. Ces tests de rupture sur le silicium ont permis de caractériser la rupture du silicium sous une contrainte de flexion et de compléter les résultats de simulation. Ces travaux démontrent, le besoin et l'utilité du prototypage virtuel des composants électroniques et de l'utilisation d'une méthodologie prédictive dans l'évaluation de la fiabilité en l’appliquant sur des composants réels. / This thesis project is a study of the predictive reliability of new microelectronic package concepts such as "system in package" SiP. The objective is to develop a reliable predictive methodology adapted to the new assembly concepts to optimize and to predict the performance at the design phase. Then, the methodology is applied to concrete projects. This methodology of predictive reliability involves the use of experimental studies, thermomechanical simulations and statistical analysis to process the data and assess the reliability and risks of failure. The use of simulation tools for electronic components is well suited to assist in the evaluation of the most fragile areas, the setting up of design rules and the determination of the most influential parameters with a reduction in the setup time market for a reliable and optimized performance. Studies on silicon strength are conducted with two tests: ball on ring test and on three-point bend test show that the grinding and the thickness influence the variation of the stress and deflection of the silicon at break. With the three points bend test, the onset of crack is linked to defects in sawing and grinding zone. However, with the ball on ring test, only the surface quality influences the initiation of cracks. The ball on ring test is well suited for evaluating the quality of the silicon surface. Chemical techniques of stress release, such as wet etching and plasma etching, improve significantly the strength of silicon samples. These tests on silicon dies are used to characterize the breakdown of silicon under bending test and to complete the simulation results. We have demonstrated in this work, the need and the usefulness of the virtual prototyping of electronic components and the use of a predictive methodology in assessing reliability.