III-V semiconductors doped with Mn atoms have been studied recently for their potential applications in spintronic devices. These materials are referred to as diluted magnetic semiconductors (DMS) or ferromagnetic semiconductors. The lattice of these materials has Mn atoms (transition metal) and due to their half filled shell carries a spin and also donates carriers, "p-type" in case of Mn doping to the semiconductor lattice. Ferromagnetism is mediated by exchange interactions between localized d electrons and p-type carriers. A high transition temperature (in fact above room temperature) called Curie point, is necessary for these materials to have a practical value. The transition temperature Tc depends on the densities of both Mn impurity and the resultant hole concentration. A low density of defects, a high crystal quality and a high concentration of Mn atoms are desirable to achieve a high Tc. Additionally, cubic (zinc blende) structure offers several advantages over the hexagonal structure normally obtained for III-V semiconductors e.g. a higher crystal symmetry, smaller effective masses, higher carrier mobility, and significantly a higher doping density-which is expected to give a higher value of Tc. Both GaMnAs and GaMnN have been the materials of choice and have been studied intensely. The problems however, are related to fabricated technique, crystal quality and achieving a high doping concentration. The materials exhibit a solubility limit beyond which doping concentration are difficult to achieve. This thesis describes the investigation of the electronic properties of the zinc blend GaMnAs and GaMnN films grown at low temperature by molecular beam epitaxy (MBE) for varies concentration of Mn doping over the temperature range 15-400 K. Metal/c-GaAs: Mn/c-GaAs:Si p n junctions were studied by the I-V, C-V and C-F methods over the temperature range 15-400 K. It was found that I-V-T data could be interpreted on the basis of a back to back diode model. The c-GaAs:Mn made a Schottky contact with the metal and a p n junction with c-GaAs:Si. It was found that for the forward bias, where metal was biased negative with respect to the GaAs:Mn, the 1- v -T data could also be analysed on the basis of a Schottky behaviour. Here ideality factor n increased and the barrier height Φb decreased with temperature. This was seen to be a consequence of TFE through the metal/GaAs barrier. This was borne out by the Richardson's plots [ln (ls/T2) versus 103/nT] which exhibited straight lines. The slope indicated the barrier heights, which ranged between 1.1-1.4 eV. The backward diode on the other hand gave a barrier height of 1.4 eV, which was compatible with the proposed model. C-V-T measurements could also be accounted for, at least qualitatively, on the basis of the proposed back to back diode model. The device structure of c-GaMnN was planar. Both the Ohmic and Schottky contact were in the same plane on the top surface. I-V measurements were performed over the temperature range 100-480 K. I-V-T was explained in the terms of the Schottky model. The current was limited, however, by the Poole-Frenkel type centres in the bulk which behaved as an insulator (high resistivity semiconductor). The C-V–T was satisfactorily accounted for on the basis of MIS/MOS model. Low temperature grown films had poor material quality which made any correlation between samples difficult.

This thesis presents an investigation of on-line supply impedance measurement. Network impedance values are invaluable for power system modelling and simulation. Without knowledge of a network structure and the impedances that make up that structure it is impossible to simulate or predict harmonic propagation within a plant. If the impedance structure for a plant is known then it may be possible to alleviate voltage distortion problems by simply redistributing sensitive loads to points of low harmonic distortion. Alternatively distorting loads may be repositioned thus removing the need for additional filters or compensation equipment. The supply impedance, in particular, is of interest. At a simple level it is important for wiring, fuse and circuit breaker calculations. It is also important when designing filters for power factor correction or harmonic attenuation. Two novel on-line impedance measurement techniques are presented. Both techniques apply a small disturbance to a power network, using measurements of the subsequent transients it is possible to identify the system impedance at the point of measurement. These techniques are implemented both in simulation and experimentally. Excellent identification was possible for linear impedance networks. The performance of the techniques was also investigated in the presence of various non-linear loads. Limitations to both approaches are identified. An active shunt filter was designed and constructed for this work. Experimental impedance measurement was undertaken using this hardware. It was therefore possible to demonstrate the possibility of impedance measurement using an existing active shunt filter and during its normal operation. Finally experimental measurement data was used to demonstrate the operation of the active shunt filter using reference currents determined from supply voltage and supply impedance.

This thesis presents an account of an investigation into the use of information theory measures in pattern recognition problems. The objectives were firstly to determine the information content of the set of representations of an input image which are found at the output of an array of sensors; secondly to assess the information which may be used to allocate different patterns to appropriate classes in order to provide a means of recognition; and thirdly to assess the recognition capability of pattern recognition systems and their efficiency of utilization of information. Information assessment techniques were developed using fundamental principles of information theory. These techniques were used to assess the information associated with attributes such as orientation and location, of a variety of input images. The techniques were extended to permit the assessment of recognition capability and to provide a measure of the efficiency with which pattern recognition systems use the information available.

Electromagnetic Compatibility (EMC) problems may occur in many environments. This Thesis considers a particular sub-set of coupling within shielded enclosures. The actual systems studied are the coupling between a dipole and either one or two rods in a screened room and the effect of a cavity and apertures on a signal travelling along a wire. Experiments are described for the screened room which investigate the repeatability of the measurements and the effects of two closely spaced conductors on the coupling results. The cavity experiments also consider the repeatability of the measurements and the effects of the apertures. Transmission-Line Modelling (TLM) is compared with some other popular modelling methods and generally described. It is applied to the modelling of the experimental systems already discussed. An inherent error associated with the modelling of wires in TLM, manifesting itself as an apparent decrease in the resonant frequency of a wire-like structure, is investigated. The source of the error is deduced and a method of minimising it is proposed. The experimental results are applied to the validation of TLM, and its error correction. Very good comparisons between the experiments and simulations are reported. Correlelograms are investigated as a method of comparing the modelled and experimental results.

The aim of this research project was to develop a position controlled induction machine vector drive operating without a speed or position sensor but having a dynamic performance comparable to that of a sensored position vector drive. The methodology relies on the detection of a rotor saliency in the machine by persistent high-frequency voltage injection. The rotor position is then estimated from the resulting stator current harmonics that are modulated by the spatial rotor saliency. This can be a built-in rotor saliency (a designed asymmetry) or the natural saliency due to rotor slotting. This project investigates the demodulation of the extracted high-frequency current spectrum and different topologies for the estimation of rotor position. The tracking of rotor position through rotor saliencies helps to overcome the limitations of model-based approaches that are restricted to speeds above 30rpm on a 4-pole machine and are sensitive to parameter mismatches. The project addresses the difficult problem of separating the modulation effects due to the rotor saliency from distorting modulations due to the saturation saliency and inverter effects. In previous research it had been found that the saturation saliency causes a deterioration of the position estimate that can result in a loss of position and eventually causes the drive to fail. The application of filters to remove the interfering saturation harmonics is not possible. In this research a new approach was developed that compensates online for the saturation effect using pre-commissioned information about the machine. This harmonic compensation scheme was utilized for a 30kW, 4-pole induction machine with asymmetric rotor and enabled the operation from zero to full load and from standstill up to about ±150rpm (±5Hz). The steady-state performance and accuracy of the resulting sensorless drive has been found to operate similarly to a sensored drive fitted with a medium resolution encoder of 600ppr. The project involved studies of the inverter switching deadtime and its distorting effect on the position estimation. A second compensation strategy was therefore developed that is better suited if a large interfering modulation due to the inverter deadtime is present in the machine. The new compensation method was implemented for a second 30kW machine that utilizes the rotor slotting saliency. Good tracking results were obtained with a mean error of less than ±0.5° mechanical under steady-state. The derivation of the position signal for higher speeds introduces an additional speed-dependent error of about 4° mechanical at 170rpm. Sensorless position control was realized for operation from zero to full load for the fully fluxed machine. The performance allowed low and zero speed operation including position transients reaching a speed of 50rpm. The high-frequency modulation introduced by the fundamental currents during transient operation was examined and identified as the main factor limiting the dynamics of the sensorless drive. Two rigs were used for the research. The first rig is build around a network of Transputers, the second rig uses state-of-the-art TMS320C40 and TMS320F240 digital signal processors for the control and was designed and constructed as part of the research.

The aim of this Thesis was to try to develop an understanding of the growth and fabrication of Double Barrier Resonant Tunnelling (DBRT) diodes, in order to enhance their properties at millimetre wave frequencies (ie. above 35GHz). Chapter 1 introduces the DBRT diode and outlines some of its applications while Chapter 2 describes aspects of device fabrication. Chapter 3 discusses the solid-state and quantum mechanical aspects which determine the DBRT's current-voltage characteristics and Chapter 4 describes an extensive parametric study relating the device properties to the high frequency behaviour. Chapter 5 covers the applications of DBRT devices at high frequencies and presents some of the results achieved so far. Besides the primary objective of studying the properties which determine the high frequency application of DBRT devices (via. the characterization of an extensive range of structures grown for the project), the other goal was to try to improve upon the results of other workers in terms of generating power and to improve the efficiency of up and down conversion at millimetre wave frequencies. Perhaps the most promising application of DBRT devices is as self-oscillating mixers (SOM) which can also provide conversion gain (due to the wide bandwidth of the negative differential resistance) at the intermediate frequency. This is of great importance since it negates the need to generate a local oscillator signal and dispenses with complicated image rejection mixer arrangements (for superheterodyne mixing) and amplification stages, which are very difficult to build and are expensive at millimetre wave frequencies. Whilst working in collaboration with staff at the University of Leeds, department of Electronic and Electrical Engineering a SOM was fabricated on microstrip which gave a modest gain at around 10GHz. Similarly a DBRT diode was operated in waveguide at 106GHz and provided -9.8dBm of power as measured on a spectrum analyzer. Both of these results represent (to the authors knowledge) the best results currently seen for DBRT devices in the UK and Europe.

Soft-switching inverters have over the last decade received a lot of attention by researchers owing to the reduction or virtual elimination of switching losses that these circuits can achieve. Possible improvements in EMC performance due to the reduced levels of dv/dt have among other advantages triggered the development of a still growing number of zero-voltage or zero-current switching inverter circuits. More recently, the trend seems to have shifted from continuously resonant systems over to quasi-resonant topologies due to advantages in terms of device stresses and PWM compatibility. In this work, continuously resonant as well as quasi-resonant techniques are reviewed. A quasi-resonant circuit will be implemented in a three-phase PWM inverter system controlled by a network of transputers. It will be examined to which degree the working principle of this Parallel Resonant DC Link (PRDCL) inverter affects the PWM compatibility and a suitable PWM strategy will be presented and implemented. The modified PWM technique shows output quality comparable to standard PWM methods while being fully compatible with the operation of the resonant link. The conversion efficiency and EMC performance of a PWM inverter drive based on the PRDCL circuit will be measured and compared to its hard-switched equivalent. It will be shown that improvements over hard-switching inverters are possible. However, the investigation of the PRDCL PWM inverter also reveals a number of drawbacks which limit the achievable switching frequency and adversely affect the conversion efficiency. Despite the many previous publications these problems have generally been overlooked in the past.

The ability of application specific integrated circuits (ASICs) to minimise the size and power consumption of electronic circuitry, makes their application to the design of ambulatory monitoring equipment, an attractive option. To this end, a multi-purpose mixed analogue and digital ASIC has been fabricated and incorporated into both a long-term recorder of adult heart rate (HR) and a recorder of electrophysiological signals. The adult HR recorder has been employed in a study of long-term daily HR patterns, which verified the ambulatory nature of this instrument, as well as its suitability for investigating HR variability. The electrophysiological signal recorder uses the ASIC to amplify, filter and digitise signals, which are then stored directly into static RAM. The analogue front-end of this instrument is flexible in terms of gain, bandwidth and sampling frequency allowing it be applied to a whole range of signals. This instrument has been used to record the antepartum fetal HR, as part of the development of an ambulatory, ASIC based recorder of fetal HR (FHR). These recordings have shown that a usable signal can be obtained from a mother in her home environment, whilst in various postures. The electrophysiological signal recorder has also been used to record the electrohysterogram (EHG), which is the name given to the electrical activity of the uterus, from abdominal electrodes during labour. A strong correlation was found to exist between tocographs derived from the EHG and tocographs produced by conventional means.

This thesis describes analytical and numerical investigations of tapered waveguide problems, for integrated optics applications. A plane wave spectral analysis, models the propagation process of the tapered waveguide and introduces the concept of an Intrinsic spectral Integral, which turns out to be in good agreement with calculations in terms of Adiabatic modes. This allows us to extend the Intrinsic mode concept beyond the singularity where the Adiabatic mode concept breaks down. In this sense, the implementation of the resulting spectral formulation; for the case of homogeneous media, contains all information pertinent to the modal propagation mechanism, inside and outside the tapered waveguide; before and after the singularity caused by cut off of the Adiabatic mode. The thesis is mainly concerned with implementing the Intrinsic mode theory as a numerical computational tool. In this respect, very good agreement is demonstrated between this model and calculations performed numerically using the parabolic equation method. On the other hand, the new model contains far greater physical and analytical possibilities than previous methods.

As advances have been made in semiconductor processing technology, the number of transistors on a chip has increased out of step with the number of input/output pins, which has introduced a communications ’bottle-neck’ in the design of computer architectures. This is a major issue in the hardware design of parallel structures implemented in either digital or analogue VLSI, and is particularly relevant to the design of neural networks which need to be highly interconnected. This work reviews hardware implementations of neural networks, with an emphasis on analogue implementations, and proposes a new method for overcoming connectivity constraints, by the use of Frequency Division Multiplexing (FDM) for the inter-chip communications. In this FDM scheme, multiple analogue signals are transmitted between chips on a single wire by modulating them at different frequencies. The main theoretical work examines the number of signals which can be packed into an FDM channel, depending on the quality factors of the filters used for the demultiplexing, and a fractional overlap parameter which was defined to take into account the inevitable overlapping of filter frequency responses. It is seen that by increasing the amount of permissible overlap, it is possible to communicate a larger number of signals in a given bandwidth. Alternatively, the quality factors of the filters can be reduced, which is advantageous for hardware implementation. Therefore, it was found necessary to determine the amount of overlap which might be permissible in a neural network implementation utilising FDM communications. A software simulator is described, which was designed to test the effects of overlap on Multilayer Perceptron neural networks. Results are presented for networks trained with the backpropagation algorithm, and with the alternative weight perturbation algorithm. These were carried out using both floating point and quantised weights to examine the combined effects of overlap and weight quantisation. It is shown using examples of classification problems, that the neural network learning is indeed highly tolerent to overlap, such that the effect on performance (i.e. on convergence or generalisation) is negligible for fractional overlaps of up to 30%, and some tolerence is achieved for higher overlaps, before failure eventually occurs. The results of the simulations are followed up by a closer examination of the mechanism of network failure. The last section of the thesis investigates the VLSI implementation of the FDM scheme, and proposes the use of the operational transconductance amplifier (OTA) as a building block for implementation of the FDM circuitry in analogue VLSI. A full custom VLSI design of an OTA is presented, which was designed and fabricated through Eurochip, using HSPICE/Mentor Graphics CAD tools and the Mietec 2.4µ CMOS process. A VLSI architecture for inter-chip FDM is also proposed, using adaptive tuning of the OTA-C filters and oscillators.This forms the basis for a program of further work towards the VLSI realisation of inter-chip FDM, which is outlined in the conclusions chapter.