The austenite stainless in high energy welding and tradition welding (TIG) produce different texture revolution and mechanicl property are main research. From EBSD analysis,austenite stainless in EBW,make more random texture to TIG welding,and main texture in TIG welding are cubic texture {100}<001> and copper texture {110}<1-1 2>.From EBW,there are some different texture in up fusion zone and down fusion zone .Experience of impact and hardness ,which find out copper and brass texture have more mechanical property for low-temperature, £_ ferrite content in center welding fusion and boundary fusion zone have different percent, then that can explain how differnt hardness value in center and fusion boundary about mechanical property.

Climate change will affect Arctic plant communities directly, by altering growth and recruitment, and indirectly, by increasing the frequency of natural disturbance. Since the structure of northern vegetation influences global climate, understanding both temperature and disturbance effects on vegetation is critical. Here, I investigate the influence of temperature and disturbance on Low Arctic vegetation at several spatio-temporal scales in the Mackenzie Delta Region, N.W.T. To disentangle the relative impact of temperature and disturbance on forest-tundra and tundra ecosystems, I sampled microenvironmental variability, plant community composition, and green alder abundance, growth, and reproduction on disturbed (burns and thaw slumps) and undisturbed sites across a regional temperature gradient. Disturbed areas showed increases in alder productivity, catkin production, and seed viability, as well as differences in plant community composition and microenvironment. The magnitude of plot-level responses to disturbance compared to variation across the temperature gradient suggests that in the short-term, increasing the frequency of disturbance may exert a stronger influence on tundra ecosystems than changes in temperature. At the plot level, increases in alder seed viability and recruitment at warmer sites point to the fine-scale mechanisms by which shrub abundance will change. To examine the relative influence of temperature and biophysical variables on landscape-level patterns of shrub dominance, I mapped Low Arctic vegetation using aerial photos. At this broader scale, correlations between temperature and the areal extent of shrub tundra suggest that warming will increase the dominance of shrub tundra. To assess the magnitude of changes in temperature and thaw slump activity, I analyzed climate records and mapped retrogressive thaw slumps using aerial photographs. An increase in thaw slump activity in recent decades, coincident with higher temperatures, suggests that continued warming will change the area affected by thermokarst disturbances like slumps. Taken together, my research indicates that the effects climate change will be magnified by shifts in the frequency of disturbance, initiating changes to Arctic vegetation with significant implications for global climate. My work also shows that to fully understand the influence of patch-landscape feedbacks on Arctic vegetation dynamics, the effects of disturbance must be examined across longer temporal and broader spatial scales.

Climate change will affect Arctic plant communities directly, by altering growth and recruitment, and indirectly, by increasing the frequency of natural disturbance. Since the structure of northern vegetation influences global climate, understanding both temperature and disturbance effects on vegetation is critical. Here, I investigate the influence of temperature and disturbance on Low Arctic vegetation at several spatio-temporal scales in the Mackenzie Delta Region, N.W.T. To disentangle the relative impact of temperature and disturbance on forest-tundra and tundra ecosystems, I sampled microenvironmental variability, plant community composition, and green alder abundance, growth, and reproduction on disturbed (burns and thaw slumps) and undisturbed sites across a regional temperature gradient. Disturbed areas showed increases in alder productivity, catkin production, and seed viability, as well as differences in plant community composition and microenvironment. The magnitude of plot-level responses to disturbance compared to variation across the temperature gradient suggests that in the short-term, increasing the frequency of disturbance may exert a stronger influence on tundra ecosystems than changes in temperature. At the plot level, increases in alder seed viability and recruitment at warmer sites point to the fine-scale mechanisms by which shrub abundance will change. To examine the relative influence of temperature and biophysical variables on landscape-level patterns of shrub dominance, I mapped Low Arctic vegetation using aerial photos. At this broader scale, correlations between temperature and the areal extent of shrub tundra suggest that warming will increase the dominance of shrub tundra. To assess the magnitude of changes in temperature and thaw slump activity, I analyzed climate records and mapped retrogressive thaw slumps using aerial photographs. An increase in thaw slump activity in recent decades, coincident with higher temperatures, suggests that continued warming will change the area affected by thermokarst disturbances like slumps. Taken together, my research indicates that the effects climate change will be magnified by shifts in the frequency of disturbance, initiating changes to Arctic vegetation with significant implications for global climate. My work also shows that to fully understand the influence of patch-landscape feedbacks on Arctic vegetation dynamics, the effects of disturbance must be examined across longer temporal and broader spatial scales.

Climate change will affect Arctic plant communities directly, by altering growth and recruitment, and indirectly, by increasing the frequency of natural disturbance. Since the structure of northern vegetation influences global climate, understanding both temperature and disturbance effects on vegetation is critical. Here, I investigate the influence of temperature and disturbance on Low Arctic vegetation at several spatio-temporal scales in the Mackenzie Delta Region, N.W.T. To disentangle the relative impact of temperature and disturbance on forest-tundra and tundra ecosystems, I sampled microenvironmental variability, plant community composition, and green alder abundance, growth, and reproduction on disturbed (burns and thaw slumps) and undisturbed sites across a regional temperature gradient. Disturbed areas showed increases in alder productivity, catkin production, and seed viability, as well as differences in plant community composition and microenvironment. The magnitude of plot-level responses to disturbance compared to variation across the temperature gradient suggests that in the short-term, increasing the frequency of disturbance may exert a stronger influence on tundra ecosystems than changes in temperature. At the plot level, increases in alder seed viability and recruitment at warmer sites point to the fine-scale mechanisms by which shrub abundance will change. To examine the relative influence of temperature and biophysical variables on landscape-level patterns of shrub dominance, I mapped Low Arctic vegetation using aerial photos. At this broader scale, correlations between temperature and the areal extent of shrub tundra suggest that warming will increase the dominance of shrub tundra. To assess the magnitude of changes in temperature and thaw slump activity, I analyzed climate records and mapped retrogressive thaw slumps using aerial photographs. An increase in thaw slump activity in recent decades, coincident with higher temperatures, suggests that continued warming will change the area affected by thermokarst disturbances like slumps. Taken together, my research indicates that the effects climate change will be magnified by shifts in the frequency of disturbance, initiating changes to Arctic vegetation with significant implications for global climate. My work also shows that to fully understand the influence of patch-landscape feedbacks on Arctic vegetation dynamics, the effects of disturbance must be examined across longer temporal and broader spatial scales. / Forestry, Faculty of / Graduate

No description available.

Este trabalho apresenta o estudo de transistores de tunelamento controlados por efeito de campo, denominados TFETs. Foram realizadas análises com base em explicações teóricas, simulações numéricas e medidas experimentais para demonstrar a viabilidade do uso desta tecnologia em blocos de circuitos fundamentais, atuando como alternativa para permitir o contínuo escalamento de dispositivos. A motivação para o uso de transistores com corrente principal resultante do tunelamento de banda para banda consiste na proposta de superar o limite físico de inclinação de sublimiar da tecnologia CMOS convencional de 60 mV/década sob temperatura ambiente. Afinal, esta limitação impede a redução na tensão de alimentação de circuitos e, consequentemente, apresenta crescentes problemas quanto à dissipação de potência. Com este objetivo, foram realizadas simulações numéricas de diversas geometrias alternativas visando atenuar as características indesejáveis dos TFETs, como a corrente ambipolar e a relativamente baixa relação ION/IOFF. Inicialmente foram definidos os modelos necessários para representar adequadamente os fenômenos relevantes sob variação de temperatura e é definida uma estrutura capaz de minimizar os efeitos da ambipolaridade. Posteriormente, medidas experimentais foram utilizadas para calibrar as simulações e estudar o efeito da temperatura e do dimensionamento no funcionamento de dispositivos desta tecnologia. Comparando resultados práticos e simulados, nota-se como uma redução no comprimento de porta, com a consequente inserção de uma subposição (underlap) em relação à junção canal/dreno, e uma diminuição na temperatura permitem a obtenção de valores promissores de inclinação de sublimiar e de relação ION/IOFF. Com base nestes resultados individuais, foram projetados circuitos básicos de aplicações analógicas, notadamente espelho de corrente e par diferencial, para a avaliação da viabilidade de duas diferentes estruturas de transistores de tunelamento. Foram realizadas medidas experimentais e simulações numéricas de ambos os circuitos com variações nas condições de polarização, na situação de descasamento entre os dispositivos e na temperatura de operação. O impacto em parâmetros fundamentais dos circuitos estudados, como a tensão de conformidade, a razão de espelhamento de corrente e o ganho de tensão diferencial, foi comparado para estruturas de tunelamento pontual (Point TFET), de tunelamento em linha (Line TFET) e de FinFETs. Em relação aos circuitos de espelhos de corrente, observou-se alta tensão de conformidade e baixa dependência com a temperatura para os circuitos com transistores de tunelamento. O Point TFET ainda apresentava a vantagem adicional da baixa susceptibilidade ao descasamento do comprimento de canal, porém com a desvantagem da baixa magnitude da corrente de referência quando comparado ao espelho com Line TFETs ou FinFETs. Já no caso de pares diferenciais, a maior tensão de conformidade foi obtida com FinFETs, enquanto os transistores de tunelamento apresentaram em comum a não degradação do ganho com a temperatura. Novamente o circuito com Point TFETs apresentou melhor resultado quando houve descasamento, enquanto que as outras duas tecnologias foram superiores quando ao ganho de tensão diferencial. Dessa forma, foram propostas equações generalizadas para os parâmetros fundamentais de ambos os circuitos para as 3 tecnologias. De modo geral, foi possível validar, portanto, a viabilidade de transistores de tunelamento para a obtenção de dispositivos com bons parâmetros individuais e com bons impactos em circuitos analógicos fundamentais, reforçando a importância desta promissora tecnologia. / This works presents the study of tunneling field effect transistors, namely TFETs. Analyses have been performed based on theoretical explanations, numerical simulations and experimental data in order to show this technology suitability as part of basic circuit blocks, being an important alternative for the continuous devices scaling. The basic idea of making use of band-to-band tunneling as the main current component comes from the possibility of reaching sub-60 mV/decade subthreshold slopes at room temperature, differently from conventional CMOS devices. After all, this physical limitation causes relevant power dissipation issues, since it requires relatively high power supply voltages. Bearing this objective, numerical simulations of several alternative geometries have been performed in order to tackle TFETs disadvantages, such as the undesirable ambipolar currents and the low ION/IOFF ratio. At first, it was necessary to choose the most appropriate models to take into consideration the relevant phenomena under temperature variation and to define the physical structure in order to minimize ambipolar effects. After these analyses, experimental data have been used to calibrate simulation parameters and to study how temperature and physical dimensions affect the performance of devices based on this technology. Comparing experimental and simulated results, it was possible to notice that when the structure is designed with gate underlap related to channel/drain junction and the temperature decreases, it was possible to obtain promising values for subthreshold slope and ION/IOFF ratio. Based on the analyses of these individual results, basic analog circuits have been designed, namely current mirror and differential pair, so that two different tunneling devices structures have been highlighted. Experimental measurements and numeric simulations have been performed for both circuits, under different conditions in terms of bias voltages, channel length mismatch and operation temperature. The impact on fundamental circuit parameters, such as compliance voltage, current mirroring ratio and differential voltage gain, has been compared for circuits designed with Point TFETs, Line TFETs and FinFETs. Regarding current mirror circuits, the obtained results revealed higher values of compliance voltage and lower susceptibility to the temperature for circuits designed with tunneling transistors. In addition, Point TFETs provided the lowest susceptibility to channel length mismatch, but also the worst values of reference currents, when compared to circuits with Line TFETs and FinFETs. Following the same procedure for differential pair, higher compliance voltage was obtained for FinFETs, while both tunneling transistors structures presented better behavior for differential voltage gain susceptibility to temperature variation. Once more, pairs with Point TFETs showed the best performance in terms of channel length mismatch, but the worst magnitude of differential voltage gain. This way, general equations have been proposed to model relevant parameters for the circuits designed with each technology. From an overall point of view, it was possible to support the suitability of optimizing tunneling transistors in order to obtain devices with favorable individual parameters and positive impacts on essential analog circuits, reassuring the relevance of this promising technology.

Este trabalho apresenta o estudo de transistores de tunelamento controlados por efeito de campo, denominados TFETs. Foram realizadas análises com base em explicações teóricas, simulações numéricas e medidas experimentais para demonstrar a viabilidade do uso desta tecnologia em blocos de circuitos fundamentais, atuando como alternativa para permitir o contínuo escalamento de dispositivos. A motivação para o uso de transistores com corrente principal resultante do tunelamento de banda para banda consiste na proposta de superar o limite físico de inclinação de sublimiar da tecnologia CMOS convencional de 60 mV/década sob temperatura ambiente. Afinal, esta limitação impede a redução na tensão de alimentação de circuitos e, consequentemente, apresenta crescentes problemas quanto à dissipação de potência. Com este objetivo, foram realizadas simulações numéricas de diversas geometrias alternativas visando atenuar as características indesejáveis dos TFETs, como a corrente ambipolar e a relativamente baixa relação ION/IOFF. Inicialmente foram definidos os modelos necessários para representar adequadamente os fenômenos relevantes sob variação de temperatura e é definida uma estrutura capaz de minimizar os efeitos da ambipolaridade. Posteriormente, medidas experimentais foram utilizadas para calibrar as simulações e estudar o efeito da temperatura e do dimensionamento no funcionamento de dispositivos desta tecnologia. Comparando resultados práticos e simulados, nota-se como uma redução no comprimento de porta, com a consequente inserção de uma subposição (underlap) em relação à junção canal/dreno, e uma diminuição na temperatura permitem a obtenção de valores promissores de inclinação de sublimiar e de relação ION/IOFF. Com base nestes resultados individuais, foram projetados circuitos básicos de aplicações analógicas, notadamente espelho de corrente e par diferencial, para a avaliação da viabilidade de duas diferentes estruturas de transistores de tunelamento. Foram realizadas medidas experimentais e simulações numéricas de ambos os circuitos com variações nas condições de polarização, na situação de descasamento entre os dispositivos e na temperatura de operação. O impacto em parâmetros fundamentais dos circuitos estudados, como a tensão de conformidade, a razão de espelhamento de corrente e o ganho de tensão diferencial, foi comparado para estruturas de tunelamento pontual (Point TFET), de tunelamento em linha (Line TFET) e de FinFETs. Em relação aos circuitos de espelhos de corrente, observou-se alta tensão de conformidade e baixa dependência com a temperatura para os circuitos com transistores de tunelamento. O Point TFET ainda apresentava a vantagem adicional da baixa susceptibilidade ao descasamento do comprimento de canal, porém com a desvantagem da baixa magnitude da corrente de referência quando comparado ao espelho com Line TFETs ou FinFETs. Já no caso de pares diferenciais, a maior tensão de conformidade foi obtida com FinFETs, enquanto os transistores de tunelamento apresentaram em comum a não degradação do ganho com a temperatura. Novamente o circuito com Point TFETs apresentou melhor resultado quando houve descasamento, enquanto que as outras duas tecnologias foram superiores quando ao ganho de tensão diferencial. Dessa forma, foram propostas equações generalizadas para os parâmetros fundamentais de ambos os circuitos para as 3 tecnologias. De modo geral, foi possível validar, portanto, a viabilidade de transistores de tunelamento para a obtenção de dispositivos com bons parâmetros individuais e com bons impactos em circuitos analógicos fundamentais, reforçando a importância desta promissora tecnologia. / This works presents the study of tunneling field effect transistors, namely TFETs. Analyses have been performed based on theoretical explanations, numerical simulations and experimental data in order to show this technology suitability as part of basic circuit blocks, being an important alternative for the continuous devices scaling. The basic idea of making use of band-to-band tunneling as the main current component comes from the possibility of reaching sub-60 mV/decade subthreshold slopes at room temperature, differently from conventional CMOS devices. After all, this physical limitation causes relevant power dissipation issues, since it requires relatively high power supply voltages. Bearing this objective, numerical simulations of several alternative geometries have been performed in order to tackle TFETs disadvantages, such as the undesirable ambipolar currents and the low ION/IOFF ratio. At first, it was necessary to choose the most appropriate models to take into consideration the relevant phenomena under temperature variation and to define the physical structure in order to minimize ambipolar effects. After these analyses, experimental data have been used to calibrate simulation parameters and to study how temperature and physical dimensions affect the performance of devices based on this technology. Comparing experimental and simulated results, it was possible to notice that when the structure is designed with gate underlap related to channel/drain junction and the temperature decreases, it was possible to obtain promising values for subthreshold slope and ION/IOFF ratio. Based on the analyses of these individual results, basic analog circuits have been designed, namely current mirror and differential pair, so that two different tunneling devices structures have been highlighted. Experimental measurements and numeric simulations have been performed for both circuits, under different conditions in terms of bias voltages, channel length mismatch and operation temperature. The impact on fundamental circuit parameters, such as compliance voltage, current mirroring ratio and differential voltage gain, has been compared for circuits designed with Point TFETs, Line TFETs and FinFETs. Regarding current mirror circuits, the obtained results revealed higher values of compliance voltage and lower susceptibility to the temperature for circuits designed with tunneling transistors. In addition, Point TFETs provided the lowest susceptibility to channel length mismatch, but also the worst values of reference currents, when compared to circuits with Line TFETs and FinFETs. Following the same procedure for differential pair, higher compliance voltage was obtained for FinFETs, while both tunneling transistors structures presented better behavior for differential voltage gain susceptibility to temperature variation. Once more, pairs with Point TFETs showed the best performance in terms of channel length mismatch, but the worst magnitude of differential voltage gain. This way, general equations have been proposed to model relevant parameters for the circuits designed with each technology. From an overall point of view, it was possible to support the suitability of optimizing tunneling transistors in order to obtain devices with favorable individual parameters and positive impacts on essential analog circuits, reassuring the relevance of this promising technology.

Este trabalho apresenta o estudo de transistores de tunelamento controlados por efeito de campo, denominados TFETs. Foram realizadas análises com base em explicação teórica, simulação numérica e medidas experimentais para demonstrar a viabilidade do uso desta tecnologia como alternativa para permitir o contínuo escalamento de dispositivos. A motivação para o uso de transistores com corrente principal resultante do tunelamento de banda para banda consiste na proposta de superar o limite físico de inclinação de sublimiar da tecnologia CMOS convencional de 60 mV/década sob temperatura ambiente. Afinal, esta limitação impede a redução na tensão de alimentação de circuitos e, consequentemente, apresenta crescentes problemas quanto à dissipação de potência. Com este objetivo, foram realizadas simulações numéricas de diversas geometrias alternativas visando atenuar as características indesejáveis dos TFETs, como a corrente ambipolar e a relativamente baixa relação ION/IOFF. Inicialmente são definidos os modelos necessários para representar adequadamente os fenômenos relevantes sob variação de temperatura e é definida uma estrutura capaz de minimizar os efeitos da ambipolaridade. Posteriormente, medidas experimentais foram utilizadas para calibrar as simulações e estudar o efeito da temperatura e do dimensionamento no funcionamento de dispositivos desta tecnologia. Comparando resultados práticos e simulados, nota-se como uma redução no comprimento de porta, com a consequente inserção de uma subposição (underlap) em relação à junção canal/dreno, e uma diminuição na temperatura permitem a obtenção de valores promissores de inclinação de sublimiar e de relação ION/IOFF, compatível com a proposta de futuras aplicações digitais e analógicas. / This works presents the study of tunneling field effect transistors, namely TFETs. Analyses were performed based on theoretical explanations, numerical simulations and experimental data in order to show this technology suitability as an alternative for the continuous devices scaling. The basic idea of making use of band-to-band tunneling as the main current component comes from the possibility of reaching sub-60 mV/decade subthreshold slopes at room temperature, differently from conventional CMOS devices. After all, this physical limitation causes relevant power dissipation issues, since it requires relatively high power supply voltages. Bearing this objective, numerical simulations of several alternative geometries were performed in order to tackle TFETs disadvantages, as the undesirable ambipolar currents and the low ION/IOFF ratio. At first, it was necessary to choose the most appropriate models to take into consideration the relevant phenomena under temperature variation and to define the physical structure in order to minimize ambipolar effects. After these analyses, experimental data were used to calibrate simulation parameters and to study how temperature and physical dimensions affect the performance of devices based on this technology. Comparing experimental and simulated results, it was possible to notice that when the structure is designed with gate underlap related to channel/drain junction and the temperature decreases, the obtained values for subthreshold slope and ION/IOFF ratio may be used as an important reference of this technology as a promising alternative for both digital and analog applications.

Este trabalho apresenta o estudo de transistores de tunelamento controlados por efeito de campo, denominados TFETs. Foram realizadas análises com base em explicação teórica, simulação numérica e medidas experimentais para demonstrar a viabilidade do uso desta tecnologia como alternativa para permitir o contínuo escalamento de dispositivos. A motivação para o uso de transistores com corrente principal resultante do tunelamento de banda para banda consiste na proposta de superar o limite físico de inclinação de sublimiar da tecnologia CMOS convencional de 60 mV/década sob temperatura ambiente. Afinal, esta limitação impede a redução na tensão de alimentação de circuitos e, consequentemente, apresenta crescentes problemas quanto à dissipação de potência. Com este objetivo, foram realizadas simulações numéricas de diversas geometrias alternativas visando atenuar as características indesejáveis dos TFETs, como a corrente ambipolar e a relativamente baixa relação ION/IOFF. Inicialmente são definidos os modelos necessários para representar adequadamente os fenômenos relevantes sob variação de temperatura e é definida uma estrutura capaz de minimizar os efeitos da ambipolaridade. Posteriormente, medidas experimentais foram utilizadas para calibrar as simulações e estudar o efeito da temperatura e do dimensionamento no funcionamento de dispositivos desta tecnologia. Comparando resultados práticos e simulados, nota-se como uma redução no comprimento de porta, com a consequente inserção de uma subposição (underlap) em relação à junção canal/dreno, e uma diminuição na temperatura permitem a obtenção de valores promissores de inclinação de sublimiar e de relação ION/IOFF, compatível com a proposta de futuras aplicações digitais e analógicas. / This works presents the study of tunneling field effect transistors, namely TFETs. Analyses were performed based on theoretical explanations, numerical simulations and experimental data in order to show this technology suitability as an alternative for the continuous devices scaling. The basic idea of making use of band-to-band tunneling as the main current component comes from the possibility of reaching sub-60 mV/decade subthreshold slopes at room temperature, differently from conventional CMOS devices. After all, this physical limitation causes relevant power dissipation issues, since it requires relatively high power supply voltages. Bearing this objective, numerical simulations of several alternative geometries were performed in order to tackle TFETs disadvantages, as the undesirable ambipolar currents and the low ION/IOFF ratio. At first, it was necessary to choose the most appropriate models to take into consideration the relevant phenomena under temperature variation and to define the physical structure in order to minimize ambipolar effects. After these analyses, experimental data were used to calibrate simulation parameters and to study how temperature and physical dimensions affect the performance of devices based on this technology. Comparing experimental and simulated results, it was possible to notice that when the structure is designed with gate underlap related to channel/drain junction and the temperature decreases, the obtained values for subthreshold slope and ION/IOFF ratio may be used as an important reference of this technology as a promising alternative for both digital and analog applications.