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1 
Investigation on negative bias temperature instability and Electrical Analysis of MOSFETs under External Mechanical StressJheng, Baotang 26 July 2009 (has links)
As one of the main sources of instability in pMOSFETs, interface state (Nit) generation has become an important reliability issue for over three decades.Interface state can be generated gradually under device operational conditions or generated rapidly under accelerated stress such as negative bias temperature instability(NBTI)In this letter,by charge pumping method,it can be seen interface traps are improved after fluorine implant, hence,drain current increases due to VT reduces.NBTI is improved as the dose of fluorine increases.
According to Power Law,the slope (n) of are almost 0.25, and the result is consistent with RD model.Therefore,the physical mechanism is dominated by SiH during NBTI stress.In addition,in order to eliminate process issue, an external mechanical uniaxial tensile stress applied on p type metal oxide semiconductor field effect transistors(pMOSFETs) is used for the study of negative bias temperature instability (NBTI)characteristics.Drain current and hole mobility decreases under uniaxial tensile strain,and the NBTI characteristics also become more serious simultaneously.The NBTI degradation mechanism and activation energy are consistent with RD model before and after applying mechanical stress.
Temperaturedependent biaxial strain effect on pMOSFETs.The fabrication of devices adopted a commercial 65 nm process on industry standard 12 in.Si wafers, in which the channel direction is parallel to Si¡Õ110¡Ö.Additionally,a selective epitaxial Si1x Gex source/drain structure was also introduced to form the uniaxial compressive stress.The external mechanical stress was performed by a bending silicon substrate, and the preparation of the bending device is described as follows,the thickness of silicon substrate was reduced from 800 to 50 um by using a Struers RotoPol21 polisher.
The influence of biaxial compressive stress on p type metal oxide semiconductor field effect transistors MOSFETs was investigated.It was found that drain current and hole mobility of ptype MOSFET with Si1xGex raised source/drain and external applied mechanical stress significantly decreased due to the increase of effective conductive mass at room temperature.
However,this phenomenon was inverted above 333K.Because the hole can gain enough thermal energy to transmit to a higher energy level by intervalley scattering,its transport mechanism was dominated by lower effective mass at higher energy level.Using strainedsilicon this method,we can study the temperaturedependent strain effects and the relationship between strain and electrical characteristics can be also investigated without any process effects.In order to strain the channel,silicon substrate is bent by applying external mechanical stress,the lattice of channel will be strained after applying uniaxial tensile stress.
Therefore,we successfully improve drain current and carrier mobility of SOI NMOSFET,and the increasing rates are 22% and 30% respectively.In addition,we can understand the influence of hot carrier effect on strain silicon by bending silicon substrate with external mechanical stress.With the increase of curvature,substrate current goes up.

2 
Noise in phototransistors.De La Moneda, Francisco Homero, January 1970 (has links)
ThesisUniversity of Florida. / Description based on print version record. Manuscript copy. Vita. Bibliography: leaves 8990.

3 
Models of the drift transistorNygaard, Paul Andrew, 1940 January 1964 (has links)
No description available.

4 
Frequency variations of transistor parametersLatorre, Victor Robert, 1931 January 1956 (has links)
No description available.

5 
A transistorized regulated power supplyRice, Lincoln Phelps 08 1900 (has links)
No description available.

6 
A study of current crowding in bipolar transistorsTanksalvala, Darius Framroze, January 1975 (has links)
Thesis (Ph. D.)University of WisconsinMadison, 1975. / Typescript. Vita. Description based on print version record. Includes bibliographical references.

7 
Iterative synthesis of a flatstaggered emitterfeedback transistor video amplifierCameron, Frank Charles January 1962 (has links)
Bruun and Grinich have previously described video amplifier designs using resistancecapacitance feedback in the emitter lead for stages in the commonemitter configuration. Diffusiontype alloyjunction transistors which are well described by the JohnsonGiacoletto hybridπ equivalent circuit, were used in both cases. The amplifier cascades described by Grinich produced Butterworthtype responses through use of polezero cancellation.
The research reported here is concerned with an alternative design method using an iterative numerical procedure to obtain broadband amplifier cascades without the use of polezero cancellation.
In addition, the method is sufficiently general to include
both drift and diffusiontype alloyjunction transistors.
Equivalent circuits of the JohnsonGiacoletto hybridπ type are reviewed and modifications necessary to treat emitter feedback amplifiers using the newer types of highfrequency transistors
are developed.
Transfer functions for stages and cascades of stages using either drift or diffusiontypes of transistors in the commonemitter configuration with emitter feedback are given. Special attention is given to the property of this type of amplifier that the zeros and poles of the transfer function are interdependent. Suitable parameters for defining this dependence are developed, and the problem of synthesizing for flat amplitude response, in spite of this dependence, is described. A numerical iterative
method of solution is proposed.
A numerical example of a threestage amplifier design using a 2N384 pnp drift transistor for maximallyflat amplitude response with a passband from 40 cps to 6.5 Mc is given. The design is compared with an equivalent amplifier of the Butterworth type obtained by the Grinich method. It is shown that an optimum interstage resistance giving maximum dc amplification exists when using this iterative method, but that there is no true optimum for Grinich designs. The theoretical designs obtained
by the iterative method give an amplification of 49.6 db, 7.6 db greater than by the Grinich method for the particular value of interstage resistance used (300Ω). Phase linearity, delay, and stepresponse overshoot are comparable for the two designs. The numerical method shows good convergence properties, except when designing for very small or very large bandwidths, or for very small dc emitter currents or interstage resistances.
An amplifier built according to the theoretical design, but fitted with an input impedancematching pad and an output emitterfollower pair for connection to a 50Ω line, is described. Test results indicate that the design values obtained using the modified JohnsonGiacoletto hybridπ equivalent circuit and the iterative method are sufficiently accurate for construction purposes
and that very little adjustment is necessary.
Suggestions for further development of the method are
given. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

8 
Noise figure of the transistor amplifierHatton, Walter Lewis January 1951 (has links)
The noise figure of the transistor amplifier is of special interest since the large quantity of excess noise present limits the usefulness of the transistor as a lownoise amplifier.
While the equivalent noise voltages generated in the emitter and collector leads vary inversely with frequency, the noise figure does not. This variation from the inverse frequency characteristic is produced by the decrease of the effective gain at higher frequencies. The subject of this thesis is the investigation of this variation.
The variation of the noise figure with frequency has been measured for several different transistors, with varying emitter and collector currents.
Equivalent diagrams have been suggested which explain the variation of the noise figure with frequency if transit time dispersion is negligible. For low frequencies, the noise figure is given by, (Formula omitted)
Variation of the noise figure due to the stray capacities is given approximately by (Formula omitted)
The variation, due to transit time effects , ignoring transit time dispersion , i s (Formula omitted)
The operating conditions for minimum noise figure of the transistor amplifier are dependent on the frequency. At low frequencies, a low value of emitter current should be used, and the lowest possible value of collector voltage which is compatible with the desired gain.
At higher frequencies a low value of emitter current should also be used but the value of the collector voltage is determined by the frequency. The higher the frequency, the higher will be the required collector voltage.
The best noise figures at higher frequencies will be obtained with transistors with the following characteristics:
(i) ʳm large
(ii) close spacing of point contacts
(iii) high value of resistivity
(iv) small transit time dispersion. Equivalent diagrams have been suggested which
parially account for the variation of the noise figure with frequency. It has been suggested that transit time dispersion would explain the remaining deviation of the noise figure from the inverse frequency characteristic. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

9 
PROBLEMS IN THE DESIGN AND FABRICATION OF UNIJUNCTION TRANSISTORS BY PLANAR TECHNOLOGYSmith, Edwyn Darwyn, 1933 January 1974 (has links)
No description available.

10 
Insulated gate bipolar transistor (IGBT) simulation using IGSpice /Mitter, Chang Su, January 1991 (has links)
Thesis (M.S.)Virginia Polytechnic Institute and State University, 1991. / Vita. Abstract. Includes bibliographical references (leaves 175176). Also available via the Internet.

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