NDLTD Global ETD Search
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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.

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Showing 241 to 250 of 680 (0.009 seconds)
241

DESIGN AND ANALYSIS OF A 32X32-BIT DATABASE FILTER CHIP BASED ON A CMOS COMPATIBLE PHOTONIC VLSI DEVICE TECHNOLOGY

TANG, JIANJING 02 September 2003 (has links)
No description available.
database processing
optical storage interfaces
optoelectronics
photonic VLSI
smart pixel
242

DESIGN AND DEMONSTRATION OF A MULTI-TECHNOLOGY FIELD PROGRAMMABLE GATE ARRAY ARCHITECTURE

MAL, PROSENJIT 01 July 2004 (has links)
No description available.
FPGA
MULTI-TECHNOLOGY
ARCHITECTURE
CMOS
VLSI
CIRCUIT
PHOTORECEIVER
RECONFIGURABLEE
243

A Novel Simulation Based Approach for Trace Signal Selection in Silicon Debug

Komari, Prabanjan 20 October 2016 (has links)
No description available.
Electrical Engineering
VLSI
EDA
CAD
Post Silicon debug
Functional Validation
244

Efficient branch and bound algorithm for the dynamic layout problem

Jariwala, Anish January 1995 (has links)
No description available.
Engineering, Industrial
VLSI
Facility Layout
Cplex Preprocessing Rules
245

One-dimensional compaction strategy for VLSI symbolic layout system

Kim, Cheongbu January 1988 (has links)
No description available.
One-Dimensional Compaction Strategy
VLSI
Symbolic Layout System
246

A VLSI design of a finite impulse response low-pass digital filter

Talej, Elie N. January 1988 (has links)
No description available.
VLSI
Finite Impulse Response
Low-Pass Digital Filter
247

Scan path design of PLA to improve its testability in VLSI realization

Chiang, Kang-Chung January 1986 (has links)
No description available.
Scan Path Design
PLA to Improve Testability
VLSI Realization
248

A VLSI-nMOS hardware implementation of an IIR bandpass orthogonal digital filter

Kaake, Fadi M. January 1986 (has links)
No description available.
A VLSI-nMOS Hardware Implementation
IIR Bandpass Orthogonal Digital Filter
249

A VLSI-nMOS hardware implementation of a high speed parallel adder

Taesopapong, Somboom January 1986 (has links)
No description available.
A VLSI-nMOS Hardware Implementation
High Speed Parallel Adder
250

Parallel processing and VLSI design: Solving large-scale linear systems

Schwarz, Eric M. January 1984 (has links)
No description available.
Parallel Processing Methods
VLSI
Large-Scale Linear Systems

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