This thesis describes the development of a compiler for OpenGLES 2.0 programs for a novel GPU. This work is a part of a larger project to develop a low-power GPU for embedded systems. Our compiler has been developed in the LLVM compiler infrastructure. The present thesis focuses on three areas of the compiler: 1) making corrections and improvements to an existing graphics shading language parser, 2) augmenting LLVM¡¦s bit-code format to support the new information from the shading language, and 3) modifying LLVM¡¦s backend to support this augmented bit-code. Much of this work is related to supporting the matrix and vector primitive data types found in OpenGL¡¦s GLSL shading language. In conjunction with several other theses, as listed in the text, this work achieves a working basic compiler for GLSL code on our new GPU. Continuing work by future researchers is necessary to make the compiler more robust and optimized.

Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2004. / Includes bibliographical references (leaves 60-64). Also available in electronic version. Access restricted to campus users.

Thesis (M.S.)--Brigham Young University. Dept. of Computer Science, 2006. / Includes bibliographical references (p. 153-157).

BLAST reports can be complicated. Viewing them graphically helps to understand them better, especially when the reports are long. At present "Web BLAST" and the stand-alone "wwwBLAST" versions, distributed by the NCBI, include graph- ical viewers for BLAST results. An alternative approach is "BLAST Graphic Viewer" developed by GMOD as part of the BioPerl library. It provides a more aesthetically pleasing and informative graphical visualization to represent BLAST results. All the strategies mentioned above are based on the use of bitmap graph- ics and dependent on JavaScript code embedded in HTML. We present Vector Graphic BLAST (VEGRA) a Python object orientated library based on BioPy- thon to yield graphical visualization of results from BLAST utilizing vector graph- ics. Graphics produced by VEGRA are better than bitmaps for illustration, more exible because they can be resized and stretched, require less memory, and their interactivity is more e ective as it is independent of tertiary technologies due to its integration into the graphic. In addition, the library facilitates a de nition of any layout for the di erent components of the graphic, as well as adjustment of size and colour properties. This dissertation studies previous alternatives and improves them by making use of vector graphics and thus allowing more e ective presentation of results. VEGRA is not just an improvement for BLAST visualiza- tion but a model that illustrates how other visualization tools could make use of vector graphics. VEGRA currently works with BLAST, nevertheless the library has been written to be extended to other visualization problems. / Thesis (M.Sc.)-University of KwaZulu-Natal, Pietermaritzburg, 2007.

Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1991. / Vita. Abstract. Includes bibliographical references (leaves 119-123). Also available via the Internet.

Thesis (M.S.)--Rochester Institute of Technology, 1996. / Typescript. Bibliography: leaves 81-83.

published_or_final_version / Industrial and Manufacturing Systems Engineering / Doctoral / Doctor of Philosophy

Thesis (M.Sc.)--York University, 2003. Graduate Programme in Earth and Space Science & Engineering. / Typescript. Includes bibliographical references (leaves 119-128). Also available on the Internet. MODE OF ACCESS via web browser by entering the following URL: http://proquest.umi.com/pqdweb?index=0&did=913494611&SrchMode=1&sid=1&Fmt=13&VInst=PROD&VType=PQD&RQT=309&VName=PQD&TS=1174573026&clientId=5220

The growing interest that multimedia processing has experimented during the last decade is motivating processor designers to reconsider which execution paradigms are the most appropriate for general-purpose processors. On the other hand, as the size of transistors decreases, power dissipation has become a relevant limitation to increases in the frequency of operation. Thus, the efficient exploitation of the different sources of parallelism is a key point to investigate in order to sustain the performance improvement rate of processors and face the growing requirements of future multimedia applications. We belief that a promising option arises from the combination of the Very Long Instruction Word (VLIW) and the vector processing paradigms together with other ways of exploiting coarser grain parallelism, such as Chip MultiProcessing (CMP). As part of this thesis, we analyze the problem of memory disambiguation in multimedia applications, as it represents a serious restriction for exploiting Instruction Level Parallelism (ILP) in VLIW architectures. We state that the real handicap for memory disambiguation in multimedia is the extensive use of pointers and indirect references usually found in those codes, together with the limited static information available to the compiler on certain occasions. Based on the observation that the input and output multimedia streams are commonly disjointed memory regions, we propose and implement a memory disambiguation technique that dynamically analyzes the region domain of every load and store before entering a loop, evaluates whether or not the full loop is disambiguated and executes the corresponding loop version. This mechanism does not require any additional hardware or instructions and has negligible effects over compilation time and code size. The performance achieved is comparable to that of advanced interprocedural pointer analysis techniques, with considerably less software complexity. We also demonstrate that both techniques can be combined to improve performance.In order to deal with the inherent Data Level Parallelism (DLP) of multimedia kernels without disrupting the existing core designs, major processor manufacturers have chosen to include MMX-like µSIMD extensions. By analyzing the scalability of the DLP and non-DLP regions of code separately in VLIW processors with µSIMD extensions, we observe that the performance of the overall application is dominated by the performance of the non-DLP regions, which in fact exhibit only modest amounts of ILP. As a result, the performance achieved by very wide issue configurations does not compensate for the related cost. To exploit the DLP of the vector regions in a more efficient way, we propose enhancing the µSIMD -VLIW core with conventional vector processing capabilities. The combination of conventional and sub-word level vector processing results in a 2-dimensional extension that combines the best of each one, including a reduction in the number of operations, lower fetch bandwidth requirements, simplicity of the control unit, power efficiency, scalability, and support for multimedia specific features such as saturation or reduction. This enhancement has a minimal impact on the VLIW core and reaches more parallelism than wider issue µSIMD implementations at a lower cost. Similar proposals have been successfully evaluated for superscalar cores. In this thesis, we demonstrate that 2-dimensional Vector-µSIMD extensions are also effective with static scheduling, allowing for high-performance cost-effective implementations.

Thesis (Ph. D.)--University of Hawaii at Manoa, 1994. / Includes bibliographical references (leaves 159-166). / Microfiche. / xiv, 166 leaves, bound ill. 29 cm