Thesis (Ph. D.)--University of Missouri-Columbia, 2002. / Typescript. Vita. Includes bibliographical references (leaves 163-177). Also available on the Internet.

As inovações tecnológicas têm propiciado transformações nas formas de interação e, principalmente, na comunicação entre as pessoas. Os avanços nas áreas de tecnologia da informação e comunicações abriram novos horizontes para a criação de demandas até então não existentes. Nesse contexto, a utilização de vídeo digital de alta definição para aplicações de tempo real ganha ênfase. Entretanto, os desafios envolvidos na manipulação da quantidade de informações necessárias à sua representação, fomentam pesquisas na indústria e na academia para minimizar os impactos sobre a largura de banda necessária para transmissão e/ou no espaço para o seu armazenamento. Para enfrentar esses problemas diversos padrões de compressão de vídeo têm sido desenvolvidos sendo que, nesse aspecto, o padrão H.264/AVC é considerado o estado da arte. O padrão H.264/AVC introduz ganhos significativos na taxa de compressão, em relação a seus antecessores, porém esses ganhos vêem acompanhados pelo aumento na complexidade computacional das ferramentas aplicadas como, por exemplo, a Codificação Aritmética Binária Adaptativa ao Contexto (CABAC). A complexidade computacional relacionado ao padrão H.264/AVC é tal que torna impraticável sua execução em software (para operar em um processador de propósito geral, ao menos para nos disponíveis atuais) com a finalidade de realizar a codificação ou decodificação em tempo real para sequências de vídeo de alta definição. Esta dissertação apresenta uma arquitetura de hardware para o processo de decodificação do CABAC, conforme especificação do padrão H.264/AVC. Tendo o objetivo de contribuir para a resolução de alguns dos problemas relacionados à tarefa de decodificação de vídeo de alta definição em tempo real. Para isso, apresenta-se uma introdução sobre conceitos fundamentais da compressão de dados e vídeo digital, além da discussão sobre as principais características do padrão H.264/AVC. O conjunto de algoritmos presentes no CABAC e o fluxo de decodificação do CABAC são descritos em detalhes. Para fundamentar as decisões de projeto um vasto conjunto de experimentos foi realizado para analisar o comportamento do bitstream durante o processo de decodificação do CABAC. A arquitetura de hardware proposta e desenvolvida é apresentada em detalhes, tendo seu desempenho comparado com outras propostas encontradas na literatura. Os resultados obtidos mostram que a arquitetura desenvolvida é eficaz em seu objetivo, pois atinge a capacidade de processamento de vídeos em alta definição (HD1080p) em tempo real. Além disso, os experimentos realizados deram origem a observações inovadoras, que permitiram determinar os pontos chave para minimizar os gargalos inerentes ao conjunto de algoritmos que compõe o CABAC. / The technological innovations of recent decades have brought changes in the forms of human interaction especially in communication area. Advances in the areas of information technology and communications opened new horizons for creating demands non-existent so far. In this scenario the high-definition digital video for real-time applications has gained emphasis for this context. However, the challenges involved in handling the amount of information necessary for its representation, promoting research in industry and academia to minimize the impact on the bandwidth needed for transmission and / or the space for the storage. To address those problems several video compression standards have been developed and the H.264/AVC standard is the state-of-the-art. The H.264/AVC standard introduces significant gains in compression rate, compared to its predecessors. These gains are obtained by an increase in computational complexity of the techniques used, such as the CABAC. The computational requirements of H.264/AVC standard is so strong that make its implementation impractical in software (to operate on a general purpose processor) for the purpose of performing encoding or decoding in real time for high-definition video sequences. This dissertation presents a new CABAD architecture with the implementation in hardware intended to solve the problems related to the task of decoding high-definition video in real time. An introduction to fundamental concepts of data compression and digital video is presented, in addition to discussing the main features of the H.264/AVC standard. The set of algorithms the CABAC and of the CABAD decode flow are described in detail. A wide number of experiments were conducted to identify the static and dynamic behavior of the bitstream to support the design decisions. At the end the developed architecture is examined and compared with other proposals found in literature. The results show that the architecture developed is effective in its purpose to handle high-definition video (HD1080p) in real time. Furthermore, the experiments have led to innovative observations to determine the key points to minimize the bottlenecks inherent in the set of algorithms that make the CABAD.

As inovações tecnológicas têm propiciado transformações nas formas de interação e, principalmente, na comunicação entre as pessoas. Os avanços nas áreas de tecnologia da informação e comunicações abriram novos horizontes para a criação de demandas até então não existentes. Nesse contexto, a utilização de vídeo digital de alta definição para aplicações de tempo real ganha ênfase. Entretanto, os desafios envolvidos na manipulação da quantidade de informações necessárias à sua representação, fomentam pesquisas na indústria e na academia para minimizar os impactos sobre a largura de banda necessária para transmissão e/ou no espaço para o seu armazenamento. Para enfrentar esses problemas diversos padrões de compressão de vídeo têm sido desenvolvidos sendo que, nesse aspecto, o padrão H.264/AVC é considerado o estado da arte. O padrão H.264/AVC introduz ganhos significativos na taxa de compressão, em relação a seus antecessores, porém esses ganhos vêem acompanhados pelo aumento na complexidade computacional das ferramentas aplicadas como, por exemplo, a Codificação Aritmética Binária Adaptativa ao Contexto (CABAC). A complexidade computacional relacionado ao padrão H.264/AVC é tal que torna impraticável sua execução em software (para operar em um processador de propósito geral, ao menos para nos disponíveis atuais) com a finalidade de realizar a codificação ou decodificação em tempo real para sequências de vídeo de alta definição. Esta dissertação apresenta uma arquitetura de hardware para o processo de decodificação do CABAC, conforme especificação do padrão H.264/AVC. Tendo o objetivo de contribuir para a resolução de alguns dos problemas relacionados à tarefa de decodificação de vídeo de alta definição em tempo real. Para isso, apresenta-se uma introdução sobre conceitos fundamentais da compressão de dados e vídeo digital, além da discussão sobre as principais características do padrão H.264/AVC. O conjunto de algoritmos presentes no CABAC e o fluxo de decodificação do CABAC são descritos em detalhes. Para fundamentar as decisões de projeto um vasto conjunto de experimentos foi realizado para analisar o comportamento do bitstream durante o processo de decodificação do CABAC. A arquitetura de hardware proposta e desenvolvida é apresentada em detalhes, tendo seu desempenho comparado com outras propostas encontradas na literatura. Os resultados obtidos mostram que a arquitetura desenvolvida é eficaz em seu objetivo, pois atinge a capacidade de processamento de vídeos em alta definição (HD1080p) em tempo real. Além disso, os experimentos realizados deram origem a observações inovadoras, que permitiram determinar os pontos chave para minimizar os gargalos inerentes ao conjunto de algoritmos que compõe o CABAC. / The technological innovations of recent decades have brought changes in the forms of human interaction especially in communication area. Advances in the areas of information technology and communications opened new horizons for creating demands non-existent so far. In this scenario the high-definition digital video for real-time applications has gained emphasis for this context. However, the challenges involved in handling the amount of information necessary for its representation, promoting research in industry and academia to minimize the impact on the bandwidth needed for transmission and / or the space for the storage. To address those problems several video compression standards have been developed and the H.264/AVC standard is the state-of-the-art. The H.264/AVC standard introduces significant gains in compression rate, compared to its predecessors. These gains are obtained by an increase in computational complexity of the techniques used, such as the CABAC. The computational requirements of H.264/AVC standard is so strong that make its implementation impractical in software (to operate on a general purpose processor) for the purpose of performing encoding or decoding in real time for high-definition video sequences. This dissertation presents a new CABAD architecture with the implementation in hardware intended to solve the problems related to the task of decoding high-definition video in real time. An introduction to fundamental concepts of data compression and digital video is presented, in addition to discussing the main features of the H.264/AVC standard. The set of algorithms the CABAC and of the CABAD decode flow are described in detail. A wide number of experiments were conducted to identify the static and dynamic behavior of the bitstream to support the design decisions. At the end the developed architecture is examined and compared with other proposals found in literature. The results show that the architecture developed is effective in its purpose to handle high-definition video (HD1080p) in real time. Furthermore, the experiments have led to innovative observations to determine the key points to minimize the bottlenecks inherent in the set of algorithms that make the CABAD.

As inovações tecnológicas têm propiciado transformações nas formas de interação e, principalmente, na comunicação entre as pessoas. Os avanços nas áreas de tecnologia da informação e comunicações abriram novos horizontes para a criação de demandas até então não existentes. Nesse contexto, a utilização de vídeo digital de alta definição para aplicações de tempo real ganha ênfase. Entretanto, os desafios envolvidos na manipulação da quantidade de informações necessárias à sua representação, fomentam pesquisas na indústria e na academia para minimizar os impactos sobre a largura de banda necessária para transmissão e/ou no espaço para o seu armazenamento. Para enfrentar esses problemas diversos padrões de compressão de vídeo têm sido desenvolvidos sendo que, nesse aspecto, o padrão H.264/AVC é considerado o estado da arte. O padrão H.264/AVC introduz ganhos significativos na taxa de compressão, em relação a seus antecessores, porém esses ganhos vêem acompanhados pelo aumento na complexidade computacional das ferramentas aplicadas como, por exemplo, a Codificação Aritmética Binária Adaptativa ao Contexto (CABAC). A complexidade computacional relacionado ao padrão H.264/AVC é tal que torna impraticável sua execução em software (para operar em um processador de propósito geral, ao menos para nos disponíveis atuais) com a finalidade de realizar a codificação ou decodificação em tempo real para sequências de vídeo de alta definição. Esta dissertação apresenta uma arquitetura de hardware para o processo de decodificação do CABAC, conforme especificação do padrão H.264/AVC. Tendo o objetivo de contribuir para a resolução de alguns dos problemas relacionados à tarefa de decodificação de vídeo de alta definição em tempo real. Para isso, apresenta-se uma introdução sobre conceitos fundamentais da compressão de dados e vídeo digital, além da discussão sobre as principais características do padrão H.264/AVC. O conjunto de algoritmos presentes no CABAC e o fluxo de decodificação do CABAC são descritos em detalhes. Para fundamentar as decisões de projeto um vasto conjunto de experimentos foi realizado para analisar o comportamento do bitstream durante o processo de decodificação do CABAC. A arquitetura de hardware proposta e desenvolvida é apresentada em detalhes, tendo seu desempenho comparado com outras propostas encontradas na literatura. Os resultados obtidos mostram que a arquitetura desenvolvida é eficaz em seu objetivo, pois atinge a capacidade de processamento de vídeos em alta definição (HD1080p) em tempo real. Além disso, os experimentos realizados deram origem a observações inovadoras, que permitiram determinar os pontos chave para minimizar os gargalos inerentes ao conjunto de algoritmos que compõe o CABAC. / The technological innovations of recent decades have brought changes in the forms of human interaction especially in communication area. Advances in the areas of information technology and communications opened new horizons for creating demands non-existent so far. In this scenario the high-definition digital video for real-time applications has gained emphasis for this context. However, the challenges involved in handling the amount of information necessary for its representation, promoting research in industry and academia to minimize the impact on the bandwidth needed for transmission and / or the space for the storage. To address those problems several video compression standards have been developed and the H.264/AVC standard is the state-of-the-art. The H.264/AVC standard introduces significant gains in compression rate, compared to its predecessors. These gains are obtained by an increase in computational complexity of the techniques used, such as the CABAC. The computational requirements of H.264/AVC standard is so strong that make its implementation impractical in software (to operate on a general purpose processor) for the purpose of performing encoding or decoding in real time for high-definition video sequences. This dissertation presents a new CABAD architecture with the implementation in hardware intended to solve the problems related to the task of decoding high-definition video in real time. An introduction to fundamental concepts of data compression and digital video is presented, in addition to discussing the main features of the H.264/AVC standard. The set of algorithms the CABAC and of the CABAD decode flow are described in detail. A wide number of experiments were conducted to identify the static and dynamic behavior of the bitstream to support the design decisions. At the end the developed architecture is examined and compared with other proposals found in literature. The results show that the architecture developed is effective in its purpose to handle high-definition video (HD1080p) in real time. Furthermore, the experiments have led to innovative observations to determine the key points to minimize the bottlenecks inherent in the set of algorithms that make the CABAD.

L'efficacité des services de compression vidéo est de nos jours un enjeu essentiel, et est appelé à le devenir d'autant plus dans le futur, comme l'indique la croissance constante du trafic vidéo et la production de nouveaux formats tels que la vidéo à haute résolution, à gamme de couleur ou dynamique étendues, ou encore à fréquence d'images augmentée. Le standard MPEG HEVC est aujourd'hui un des schémas de compression les plus efficaces, toutefois, il devient nécessaire de proposer de nouvelles méthodes originales pour faire face aux nouveaux besoins de compression. En effet, les principes de bases des codecs modernes ont été conçu il y a plus de 30 ans : la réduction des redondances spatiales et temporelles du signal en utilisant des outils de prédiction, l'utilisation d'une transformée afin de diminuer d'avantage les corrélations du signal, une quantification afin de réduire l'information non perceptible, et enfin un codage entropique pour prendre en compte les redondances statistiques du signal. Dans cette thèse, nous explorons de nouvelles méthodes ayant pour but d'exploiter d'avantage les redondances du signal vidéo, notamment à travers des techniques multi-patchs. Dans un premier temps, nous présentons des méthodes multi-patchs basées LLE pour améliorer la prédiction Inter, qui sont ensuite combinées pour la prédiction Intra et Inter. Nous montrons leur efficacité comparé à H.264. La seconde contribution de cette thèse est un schéma d'amélioration en dehors de la boucle de codage, basé sur des méthodes de débruitage avec épitome. Des épitomes de bonne qualité sont transmis au décodeur en plus de la vidéo encodée, et nous pouvons alors utiliser coté décodeur des méthodes de débruitage multi-patchs qui s'appuient sur les patchs de bonne qualité contenu dans les épitomes, afin d'améliorer la qualité de la vidéo décodée. Nous montrons que le schéma est efficace en comparaison de SHVC. Enfin, nous proposons un autre schéma d'amélioration en dehors de la boucle de codage, qui s'appuie sur un partitionnement des patchs symétrique à l'encodeur et au décodeur. Coté encodeur, on peut alors apprendre des projections linéaires pour chaque partition entre les patchs codés/décodés et les patchs sources. Les projections linéaires sont alors envoyés au décodeur et appliquées aux patchs décodés afin d'en améliorer la qualité. Le schéma proposé est efficace comparé à HEVC, et prometteur pour des schémas scalables comme SHVC. / Efficient video compression is nowadays a critical issue, and is expected to be more and more crucial in the future, with the ever increasing video traffic and the production of new digital video formats with high resolution, wide color gamut, high dynamic range, or high frame rate. The MPEG standard HEVC is currently one of the most efficient video compression scheme, however, addressing the future needs calls for novel and disruptive methods. In fact, the main principles of modern video compression standards rely on concepts designed more than 30 years ago: the reduction of spatial and temporal redundancies, through prediction tools, the use of a transform to further reduce the inner correlations of the signal, followed by quantization to remove non-perceptive information, and entropy coding to remove the remaining statistical redundancies. In this thesis, we explore novel methods which aims at further exploiting the natural redundancies occurring in video signals, notably through the use of multi-patches techniques. First, we introduce LLE-based multi-patches methods in order to improve Inter prediction, which are then combined for both Intra and Inter predictions, and are proven efficient over H.264. We then propose epitome-based de-noising methods to improve the performances of existing codecs in a out-of-the-loop scheme. High quality epitomes are transmitted to the decoder in addition to the coded sequence, and we can then use at the decoder side multi-patches de-noising methods relying on the high quality patches from the epitomes, in order to improve the quality of the decoded sequence. This scheme is shown efficient compared to SHVC. Finally, we proposed another out-of-the-loop scheme relying on a symmetric clustering of the patches performed at both encoder and decoder sides. At the encoder side, linear mappings are learned for each cluster between the coded/decoded patches and the corresponding source patches. The linear mappings are then sent to the decoder and applied to the decoded patches in order to improve the quality of the decoded sequence. The proposed scheme improves the performances of HEVC, and is shown promising for scalable schemes such as SHVC.

No description available.

This diploma thesis deals with design of embedded computer vision system and transfer of existing computer vision application for 3D object detection from Windows OS to designed embedded system with Linux OS. Thesis focuses on design of communication interface for system control and camera video transfer through local network with video compression. Then, detection algorithm is enhanced by transferring computationally expensive functions to GPU using CUDA technology. Finally, a user application with graphical interface is designed for system control on Windows platform.

Autonomous vehicles is going to be a part of future transport of goods and people, but to make them usable in unpredictable situations presented in real traffic, there is need for backup systems for manual vehicle control. Teleoperation, where a driver controls the vehicle remotely, has been proposed as a backup system for this purpose. This technique is highly dependent on stable and large wireless network bandwidth to transmit high resolution video from the vehicle to the driver station. Reduction in network bandwidth, resulting in a reduced level of detail in the video stream, could lead to a higher risk of driver error. This thesis is a two part investigation. One part looking into whether lower resolution and increased lossy compression of video at the operator station affects driver performance and safety of operation during teleoperation. The second part covers implementation of two vision-based driver assistance systems, one which detects and highlights vehicles and pedestrians in front of the vehicle, and one which detects and highlights lane markings. A driving test was performed at an asphalt track with white markings for track boundaries, with different levels of video quality presented to the driver. Reducing video quality did have a negative effect on lap time and increased the number of times the track boundary was crossed. The test was performed with a small group of drivers, so the results can only be interpreted as an indication toward that video quality can negatively affect driver performance. The vision-based driver assistance systems for detection and marking of pedestrians was tested by showing a test group pre-recorded video shot in traffic, and them reacting when they saw a pedestrian about to cross the road. The results of a one-way analysis of variance, shows that video quality significantly affect reaction times, with p = 0.02181 at significance level α = 0.05. A two-way analysis of variance was also conducted, accounting for video quality, the use of a driver assistance system marking pedestrians, and the interaction between these two. The results point to that marking pedestrians in very low quality video does help reduce reaction times, but the results are not significant at significance level α = 0.05.

No description available.

This thesis is devoted to the study of a compression and transmission framework for video. It exploits the JPEG 2000 standard and the coding with side information principles to enable an efficient interactive browsing of video sequences. During the last decade, we have witnessed an explosion of digital visual information as well as a significant diversification of visualization devices. In terms of viewing experience, many applications now enable users to interact with the content stored on a distant server. Pausing video sequences to observe details by zooming and panning or, at the opposite, browsing low resolutions of high quality HD videos are becoming common tasks. The video distribution framework envisioned in this thesis targets such devices and applications. Based on the conditional replenishment framework, the proposed system combines two complementary coding methods. The first one is JPEG 2000, a scalable and very efficient compression algorithm. The second method is based on the coding with side information paradigm. This technique is relatively novel in a video context, and has been adapted to the particular scalable image representation adopted in this work. Interestingly, it has been improved by integrating an image source model and by exploiting the temporal correlation inherent to the sequence. A particularity of this work is the emphasis on the system scalability as well as on the server complexity. The proposed browsing architecture can scale to handle large volumes of content and serve a possibly very large number of heterogeneous users. This is achieved by defining a scheduler that adapts its decisions to the channel conditions and to user requirements expressed in terms of computational capabilities and spatio-temporal interest. This scheduling is carried out in real-time at low computational cost and in a post-compression way, without re-encoding the sequences.