Thesis (Ph.D.)--Syracuse University, 2008. / "Publication number: AAT 3333567."

Thesis (M.S.)--Oregon State University, 2005. / Printout. Includes bibliographical references (leaf 56). Also available on the World Wide Web.

Thesis (Ph. D.)--Oregon State University, 2009. / Printout. Includes bibliographical references (leaves 80-84). Also available on the World Wide Web.

Thesis (M.S.)--Oregon State University, 2006. / Printout. Includes bibliographical references (leaves 49-50). Also available on the World Wide Web.

Thesis (Ph. D.)--University of Hong Kong, 2005. / Title proper from title frame. Also available in printed format.

Thesis (M.S.)--Oregon State University, 2010. / Printout. Includes bibliographical references (leaves 71-76). Also available on the World Wide Web.

Many emerging applications call for wideband analog-to-digital converters and some require medium-to-high resolution. Incorporating such ADCs allows for shifting as much of the signal processing tasks as possible to the digital domain, where more flexible and programmable circuits are available. However, realizing such ADCs with the existing single stage architectures is very challenging. Therefore, parallel ADC architectures such as time-interleaved structures are used. Unfortunately, such architectures require high-speed high-precision sample-and-hold (S/H) stages that are challenging to implement. In this thesis, a parallel ADC architecture, namely, the frequency-translating hybrid ADC (FTH-ADC) is proposed to increase the conversion speed of the ADCs, which is also suitable for applications requiring medium-to-high resolution ADCs. This architecture addresses the sampling problem by sampling on narrowband baseband subchannels, i.e., sampling is accomplished after splitting the wideband input signals into narrower subbands and frequency-translating them into baseband where identical narrowband baseband S/Hs can be used. Therefore, lower-speed, lower-precision S/Hs are required and single-chip CMOS implementation of the entire ADC is possible. A proof of concept board-level implementation of the FTH-ADC is used to analyze the effects of major analog non-idealities and errors. Error measurement and compensation methods are presented. Using four 8-bit, 100 MHz subband ADCs, four 25 MHz Butterworth filters, two 64-tap FIR reconstruction filters, and four 10-tap FIR compensation filters, a total system with an effective sample rate of 200 MHz is implemented with an effective number of bits of at least 7 bits over the entire 100 MHz input bandwidth. In addition, one path of an 8-GHz, 4-bit, FTH-ADC system, including a highly-linear mixer and a 5th-order, 1 GHz, Butterworth Gm-C filter, is implemented in a 90 nm CMOS technology. Followed by a 4-bit, 4-GHz subband ADC, the blocks consume a total power of 52 mW from a 1.2 V supply, and occupy an area of 0.05 mm2. The mixer-filter has a THD ≤ 5% (26 dB) over its full 1 GHz bandwidth and provides a signal with a voltage swing of 350 mVpp for the subsequent ADC stage. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

Wireless communication is part of our daily life in several applications, such as cell phones, wireless printers, sensors, etc. Each wireless device requires at least one antenna to communicate with other devices. In 2002, Federal Communications Commission (FCC) assigned a frequency spectrum from 3.1 GHz to 10.6 GHz for ultra-wideband communications. Several narrowband antennas require to cover the entire range. Unlike narrowband antennas, ultra-wideband antennas need to cover the wide frequency band. This research mainly focuses on physically small antenna designs. The first antenna discussed in this dissertation is a dual, triple trident antenna with dimensions 24 mm × 28 mm × 0.785 mm, which will operate from 3 GHz to 12.15 GHz [58]. The first antenna consists of six tridents symmetrical along the vertical direction. The second antenna design is a novel rectangular ring ultra-wideband antenna [59]. Large antennas operate for low frequency, and small antennas work for high frequency. The number of rings increased in wideband antenna to 9 from 4 to check the design methodology. The rectangular ring ultra-wideband antenna has dimensions 24 mm × 26 mm × 1.52 mm. This antenna operates from 3.12 GHz to 12.85 GHz. The third antenna design is an ultra-wideband dual square trident planar antenna. This antenna’s overall size is 26 mm × 24 mm × 1.56 mm [60]. This antenna has impedance bandwidth from 3.65 GHz to 12.50 GHz. The fourth antenna design is an ultra-wideband antenna with a band notch from 5.05 GHz to 5.9 GHz [61]. This antenna consists of two tridents and two split-ring resonators along the microstrip feed line. The overall size of this antenna 26 mm ×24 mm × 1.53mm. Simulations are carried out using the CST microwave studios® to analyze the antenna performance. Experiments are conducted to verify the simulated results using vector network analyzers for impedance and anechoic antenna chamber for radiation characteristics of the antenna. All four antennas are excellent for the wireless device due to their compact size and planar designs.

In recent years, microwave ablation therapy has become widely investigated as an alternative treatment to cancer. This method is one of the newest forms of ablation techniques for the removal of tumors and is minimally invasive compared to alternative treatments. One drawback to many of the current microwave ablation systems is the narrowband nature of the antennas used for the probe, such as dipole antennas. This study aims to compare ablation results of both ultra-wideband and narrowband ablation techniques. An ultra-wideband ablation probe is designed that operates from 400MHz to 2.6GHz and are compared to two designed narrowband ablation probes that operate at 915MHz and 2.4GHz, respectively. These ablation probes are tested in tissue mimicking gels and porcine liver. Provided results for this thesis will include probe designs, simulation results, and ablation experiments.

No description available.