This research discusses the design, fabrication, integration, and characterization of micromachined millimeter-wave components and a signal source for THz multiplier source using the deep reactive ion etching technique. A wide range of advanced micromachined millimeter-wave components are proposed and fully validated with the measurement. These micromachined millimeter-wave passives include: the W-band straight and meander waveguides, W-band three-pole filter, waveguide hybrid and power divider, a novel CPW-to-waveguide transition and filter, and a novel cavity resonator for 60-GHz reconfigurable applications. The proposed THz multiplier source is a broadband 900-GHz silicon micromachined two-anode frequency tripler with the state-of-the-art performance. The research results enable the silicon micromachining technique to build low-loss and low-cost millimeter-wave components and THz signal sources.

The potential of implementing subthreshold radio frequency circuits in deep sub-micron CMOS technology was investigated for developing low-power front-ends for wireless personal area network (WPAN) applications. It was found that the higher transconductance to bias current ratio in weak inversion could be exploited in developing low-power wireless front-ends, if circuit techniques are employed to mitigate the higher device noise in subthreshold region. The first fully integrated subthreshold low noise amplifier was demonstrated in the GHz frequency range requiring only 260 μW of power consumption. Novel subthreshold variable gain stages and down-conversion mixers were developed. A 2.4 GHz receiver, consuming 540 μW of power, was implemented using a new subthreshold mixer by replacing the conventional active low noise amplifier by a series-resonant passive network that provides both input matching and voltage amplification. The first fully monolithic subthreshold CMOS receiver was also implemented with integrated subthreshold quadrature LO (Local Oscillator) chain for 2.4 GHz WPAN applications. Subthreshold operation, passive voltage amplification, and various low-power circuit techniques such as current reuse, stacking, and differential cross coupling were combined to lower the total power consumption to 2.6 mW. Extremely compact resistive feedback CMOS low noise amplifiers were presented as a cost-effective alternative to narrow band LNAs using high-Q inductors. Techniques to improve linearity and reduce power consumption were presented. The combination of high linearity, low noise figure, high broadband gain, extremely small die area and low power consumption made the proposed LNA architecture a compelling choice for many wireless applications.