The understanding of surfaces of materials is of crucial importance to all of us. Considering nanocrystals (NCs), that have a large surface to bulk ratio, the surfaces become even more important. Therefore, it is important to understand the fundamental surface properties in order to use NCs efficiently in applications. In the work reported in this thesis ZnO NCs were studied. At MAX-lab in Lund, synchrotron radiation based Spectroscopic Photoemission and Low Energy Electron Microscopy (SPELEEM) and X-ray Photoelectron Spectroscopy (XPS) were used. At Karlstad University characterization was done using Scanning Electron Microscopy (SEM), Transmission Electron Microscopy (TEM), Atomic Force Microscopy (AFM), Scanning Tunnelling Microscopy (STM), Auger Electron Spectroscopy (AES), and XPS. The fundamental properties of ZnO surfaces were studied using distributions of ZnO NCs on SiO2/Si surfaces. The conditions for distribution of ZnO NCs were determined to be beneficial when using ethanol as the solvent for ultrasonically treated dispersions. Annealing at 650 °C in UHV cleaned the surfaces of the ZnO NCs enough for sharp LEEM imaging and chemical characterization while no sign of de-composition was found. A flat energy band structure for the ZnO/SiO2/Si system was proposed after 650 °C. Increasing the annealing temperature to 700 °C causes a de-composition of the ZnO that induce a downward band bending on the surfaces of ZnO NCs. Flat ZnO NCs with predominantly polar surfaces were grown using a rapid microwave assisted process. Tuning the chemistry in the growth solution the growth was restricted to only plate-shaped crystals, i.e. a very uniform growth. The surfaces of the NCs were characterized using AFM, revealing a triangular reconstruction of the ZnO(0001) surface not seen without surface treatment at ambient conditions before. Following cycles of sputtering and annealing in UHV, we observe by STM a surface reconstruction interpreted as 2x2 with 1/4 missing Zn atoms. / Baksidestext The understanding of the surfaces of materials is of crucial importance to all of us. Considering nanocrystals (NCs), that have a large surface to bulk ratio, the surfaces become even more important. In the work in this thesis ZnO NCs were studied. The fundamental properties of ZnO surfaces were studied using distributions of ZnO NCs on SiO2/Si surfaces. Annealing at 650 °C in UHV cleaned the surfaces of the ZnO NCs enough for sharp LEEM imaging and chemical characterization while no sign of de-composition was found. A flat energy band structure for the ZnO/SiO2/Si system was proposed after 650 °C. Increasing the annealing temperature to 700 °C causes a de-composition of the ZnO that induce a downward band bending on the surfaces of ZnO NCs. Flat ZnO NCs with predominantly polar surfaces were grown using a microwave assisted process. Tuning the chemistry in the growth solution the growth was restricted to only plate-shaped crystals, i.e. a very uniform growth. The surfaces of the NCs were characterized using AFM, revealing a triangular reconstruction of the ZnO(0001) surface not seen without surface treatment at ambient conditions before. Following cycles of sputtering and annealing in UHV, we observe by STM a surface reconstruction interpreted as 2x2 with 1/4 missing Zn atoms.

In modern cryptanalysis, an active attacker may induce errors during the computation of a cryptographic algorithm and exploit the faulty results to extract information about the secret key in embedded systems. This kind of attack is called a fault attack. There have been various attack mechanisms with diff erent fault models proposed in the literature. Among them, clock glitch faults support practically dangerous fault attacks on cryptosystems. This thesis presents an FPGA-based practical testbed for characterizing exploitable clock glitch faults and uniformly evaluating cryptographic systems against them. Concentrating on Advanced Encryption Standard (AES), simulation and experimental results illustrates proper features for the clock glitches generated by the implemented on-chip glitch generator. These glitches can be injected reliably with acceptably accurate timing. The produced faults are random but their eff ect domain is finely controllable by the attacker. These features makes clock glitch faults practically suitable for future possible complete fault attacks on AES. This research is important for investigating the viability and analysis of fault injections on various cryptographic functions in future embedded systems.

The forth recommendation of symmetric block cipher mode of operation SP800-38D, <em>Galois/Counter Mode of Operation</em> (GCM) was developed by David A McGrew and John Viega. GCM uses an approved symmetric key block cipher with a block size of 128 bits and a universal hashing over a binary Galois field to provide confidentiality and authentication. It is built specifically to support very high data rates as it can take advantage of pipelining and parallel processing techniques. <br /><br /> Before GCM, SP800-38A only provided confidentiality and SP800-38B provided authentication. SP800-38C provided confidentiality using the counter mode and authentication. However the authentication technique in SP800-38C was not parallelizable and slowed down the throughput of the cipher. Hence, none of these three recommendations were suitable for high speed network and computer system applications. <br /><br /> With the advent of GCM, authenticated encryption at data rates of several Gbps is now practical, permitting high grade encryption and authentication on systems which previously could not be fully protected. However there have not yet been any published results on actual architectures for this standard based on FPGA technology. <br /><br /> This thesis presents a fully pipelined and parallelized hardware architecture for AES-GCM which is GCM running under symmetric block cipher AES on a FPGA multi-core platform corresponding to the IPsec ESP data flow. <br /><br /> The results from this thesis show that the round transformations of confidentiality and hash operations of authentication in AES-GCM can cooperate very efficiently within this pipelined architecture. Furthermore, this AES-GCM hardware architecture never unnecessarily stalls data pipelines. For the first time this thesis provides a complete FPGA-based high speed architecture for the AES-GCM standard, suitable for high speed embedded applications.

The forth recommendation of symmetric block cipher mode of operation SP800-38D, <em>Galois/Counter Mode of Operation</em> (GCM) was developed by David A McGrew and John Viega. GCM uses an approved symmetric key block cipher with a block size of 128 bits and a universal hashing over a binary Galois field to provide confidentiality and authentication. It is built specifically to support very high data rates as it can take advantage of pipelining and parallel processing techniques. <br /><br /> Before GCM, SP800-38A only provided confidentiality and SP800-38B provided authentication. SP800-38C provided confidentiality using the counter mode and authentication. However the authentication technique in SP800-38C was not parallelizable and slowed down the throughput of the cipher. Hence, none of these three recommendations were suitable for high speed network and computer system applications. <br /><br /> With the advent of GCM, authenticated encryption at data rates of several Gbps is now practical, permitting high grade encryption and authentication on systems which previously could not be fully protected. However there have not yet been any published results on actual architectures for this standard based on FPGA technology. <br /><br /> This thesis presents a fully pipelined and parallelized hardware architecture for AES-GCM which is GCM running under symmetric block cipher AES on a FPGA multi-core platform corresponding to the IPsec ESP data flow. <br /><br /> The results from this thesis show that the round transformations of confidentiality and hash operations of authentication in AES-GCM can cooperate very efficiently within this pipelined architecture. Furthermore, this AES-GCM hardware architecture never unnecessarily stalls data pipelines. For the first time this thesis provides a complete FPGA-based high speed architecture for the AES-GCM standard, suitable for high speed embedded applications.

Ultrathin graphite films, with thickness from 1-30 atomic layers, are grown on the Si-terminated and C-terminated faces of 6H-SiC and 4H-SiC via thermal desorption of silicon in an ultrahigh vacuum (UHV) chamber or in a high-vacuum RF furnace. Graphite LEED patterns and atom-resolved STM images on graphite films prove that epitaxial growth is achieved on both faces of the SiC substrate. The thickness of graphite films is estimated with modeling the Si:C Auger peak intensities. Through LEED and STM investigations of monolayer graphite grown on the Si-face of SiC(0001) surface, we show the existence of a SiC 6R3*6R3 reconstructed layer between graphite films and the SiC substrate. The complicated LEED patterns can be interpreted partially by the kinematic scattering of the interfacial layer and the 6*6 surface corrugation. Further scanning tunneling spectroscopy (STS) measurements indicate that the graphite films remain continuous over the steps between domains. Carbon nanotubes and carbon nanocaps cover about 40% of the graphitized C-face of SiC. The remaining areas are flat graphite films. Graphite ribbons were made through E-beam lithography. After the lithography process, the graphitic features remain on flat region underneath HSQ residues.

How to solve a multivariate quadratic polynomial equation system is believed to be one of the key points to beark AES. But to solve the MQE problem is NP-hard, so it's very important to develop a good algorithm to solve it. In such a situation, the XL algorithm is claimed to be the method to solve the MQE problem, and the cryptographers pay a lot of attetion to it. But the XL algorithm works only when the equation system is overdefined, for this reason cryptographers are looking for some ways, such as BES, to increase the numbers of equations. In practice we know that the process of solving MQE, the system will extend very fast, therefore if we input too many equations and variates, we usually using out of memory before finding out the solution. In the paper we use multiple plaintext-ciphertext to increase the number of equations and try to do some pre-computing work to reduce the size of a problem, and make it work better in pratice.

Most process of lease is done manually in the past. Since the networks were used extensively and systems of Point of Sales risen quickly, the efficiency of administration of payment flow had been obviously promoted. What are mostly encrypted are information of payment flow, but what we encrypt is the information of leased products this time. We apply encryption technique to the lease system, and access information via RS-232 devices, such as SmartCard Reader and EM Reader. After processing of system and encryption, the system will transfer the processed data to the server. In this paper, we take Kaohsiung C-Bike Lease System for case study, our discussion will focus on network packet, data encryption, and real-time monitoring. We will also introduce critical features and mechanisms of the lease system and address some issues we encountered. This system encrypts data via Advanced Encryption Standard, sends out data packets via TCP/IP, and monitors leased bikes via databases and framework of multi-thread.

Diss. Phil. D., [19..]. / Notes bibliogr. Le résumé de la thèse porte les dates de : "A. D. 68-81", qui correspondent à la table des matières.

Η αυξανόμενη χρήση ασύρματων συσκευών προωθεί την υλοποίηση WLANs, διευκολύνοντας τον χρήστη να έχει πρόσβαση στις πηγές του δικτύου οποιαδήποτε στιγμή και από οποιοδήποτε σημείο. Όμως, ένα από τα προβλήματα που εισάγει η ασύρματη επικοινωνία είναι η ασφάλεια των μεταδιδόμενων δεδομένων όσον αφορά το ασύρματο κομμάτι της σύνδεσης, δηλαδή μεταξύ χρήστη και σημείου πρόσβασης ή μεταξύ δύο χρηστών. Το νεότερο πρωτόκολλο προστασίας που διευθετεί το θέμα της ασφάλειας είναι το IEEE 802.11i. Σκοπός αυτής της διπλωματικής εργασίας είναι η μελέτη και η υλοποίηση του μηχανισμού κρυπτογράφησης του πρωτοκόλλου CCMP σε γλώσσα περιγραφής υλικού VHDL, που αποτελεί το κύριο πρωτόκολλο προστασίας δεδομένων που ορίζει το πρωτόκολλο IEEE 802.11i. / The growing use of wireless applications boosts the evolution of WLANs, so that the user can have full access to the net sources regardless time and place. However, one of the biggest issues of wireless communications is the safety of the transported data between the station and the Access Point or between the two stations. IEEE 802.11i is the recent protocol for protection in WLANs. The goals of this thesis are the study and the development of the cryptographic protocol CCMP in VHDL. CCMP is the mandatory cryptographic protocol defined in IEEE 802.11i.

The research in this thesis aims to develop new mechanistic knowledge for coating processes at 2024-Al alloy surfaces, ultimately to aid the design of new protective coatings. Coatings formed by phosphating, chromating, and permanganating were characterized especially by scanning Auger microscopy (SAM), X-ray photoelectron spectroscopy, and scanning electron microscopy . The objective was to learn about growth (nm level) as a function of time for different coating baths, as well as a function of lateral position across the different surface microstructural regions, specifically on the μm-sized Al-Cu-Mg and Al-Cu-Fe-Mn particles which are embedded in the alloy matrix . The research characterizes coating thickness, composition, and morphology. The thesis emphasizes learning about the effect of different additives in zinc phosphating baths . It was found that the Ni²⁺ additive has two main roles : first, the rate of increase in local solution pH is limited by the slower kinetics of reactions involving Ni²⁺ compared to Zn²⁺, leading to thinner zinc phosphate (ZPO) coatings when Ni²⁺ is present. Second, most Ni²⁺ deposition occurs during the later stages of the coating process in the form of nickel phosphate and a Ni-Al oxide in the coating pores on the alloy surface, increasing the corrosion resistance. Aluminum fluoride precipitates first during the initial stages of the coating process, followed by aluminum phosphate, zinc oxide, and finally ZPO. When Ni²⁺ is present in the coating solution at 2000 ppm, ZnO predominates in the coating above the A-Cu-Fe-Mn particle while ZPO dominates on the rest of the surface. The Mn²⁺ additive gives a more even coating distribution (compared with Ni²⁺) across the whole surface. The Mn²⁺ -containing ZPO coating is similar to the chromate coating in terms of evenness, while there is more coating deposition at the second-phase particles for permanganate coatings. The oxides on the Al-Cu-Fe-Mn and matrix regions are similar before coating, thereby confirming that a variety of observed differences in ZPO coating characteristics at these regions arise from the different electrochemical characteristics of the underlying metals. Upon exposure to a corrosive solution, the ZPO coating provides more protection to the second-phase particles compared to the matrix.