Reconfigurable antennas represent a recent innovation in antenna design that changes from classical fixed-form, fixed-function antennas to modifiable structures that can be adapted to fit the requirements of a time varying system. Advances in microwave semiconductor processing technologies have enabled the use of compact, ultra-high quality RF and microwave switches in novel aspects of antenna design. This dissertation introduces the concept of reconfigurable antenna bandwidth control and how advances in switch technology have made these designs realizable. Specifically, it details the development of three new antennas capable of reconfigurable bandwidth control. The newly developed antennas include the reconfigurable ring patch, the reconfigurable planar inverted-F and the reconfigurable parasitic folded dipole. The relevant background work to these designs is described and then design details along with computer simulations and measured experimental results are given. / Ph. D.

Optical communications systems operate at the limits of their margins to respond to increasing capacity demands. Some of the signal processing functions required must soon operate at speeds beyond electronic implementation. Optical signal processors are fundamentally analog which requires precise control of the operating state. Programmable optical components are consequently essential. The thesis explores and elucidates the properties of meshes of generalized Mach-Zehnder interferometers (GMZIs) amenable to silicon (Si) photonics integration that are based on multimode interference couplers with programmability achieved via voltage controlled phase-shift elements within the interferometer arms to perform a variety of finite impulse response (FIR) and infinite impulse response (IIR) signal processing functions. The thesis presents a novel class of integrated photonic phased array systems with a single-stage, multistage, and feedback architectures. The designed photonic integrated systems utilize nano-electromechanical-system (NEMS) operated phase shifters of cascaded free suspended slot waveguides that are compact and require a small amount of power to operate. The structure of the integrated photonic phased array switch (IPPAS) elements is organized such that it brings the NEMS-operated phase shifters to the exterior sides of the construction; facilitating electrical connection. The transition slot couplers used to interconnect the phase shifters to the rest of the silicon structure are designed to enable biasing one of the silicon beams of each phase shifter from an electrode located at the side of the phase shifter. The other silicon beam of each phase shifter is biased through the rest of the silicon structure of the fabric, which is taken as a ground. Phased array processors of 2×2 and 4×4 multiple-input-multiple-output (MIMO) ports are conveniently designed within reasonable footprints native to the current fabrication technologies. The response of the single-stage 4×4 broadband IPPAS element is determined, and its phase synthesis states required for single-throw, double-throw and broadcast routing operations are predicted. The transmission responses of the single-stage wavelength division multiplexing (WDM) processors of 2×2 and 4×4 MIMO ports are simulated. The wavelength steering capability of the transmission interferograms by applying progressive phase shifts through the array of NEMS-operated phase shift elements of the single-stage 4×4 WDM (de)multiplexer is demonstrated. The advantages of cascading broadband and WDM phased array sections are articulated through several study cases. Five different cascaded phased array architectures are trialed for the construction of non-blocking 4×4 IPPAS broadband switches that are essential elements in the construction of universal photonic processors. A cascaded 2×2 WDM (de)multiplexer that can set the bandwidth of the (de)multiplexed cyclic channels into a binary number of programmable values is demonstrated. The envelope and wavelength modulations of the transmission responses utilizing a cascaded forward structure of three 2×2 sections that can be utilized for the (de)multiplexing of different bandwidth channels are demonstrated providing individual wavelength steering capability of the narrowband and wideband channels and the individual wavelength steering capability of the slow envelope and wavelength modulating functions. Innovative universal 2×2 and 4×4 cascaded phased array processors of advanced high-order architectures that can function as both non-blocking broadband routers and tunable WDM (de)multiplexers with spectrum steering and bandwidth control of the (de)multiplexed demands are introduced. The multimode interference (MMI) coupler is utilized for the construction of several IIR feedback photonic processors. Tunable photonic feedback processors have the advantage of using less number of MMI couplers compared to their counterparts of FIR forward-path processors saving on the footprint and loss merits. A passive feedback 2×2 (de)multiplexer made of a 4×4 MMI coupler and two loopback paths is proposed. The inclusion of an imbalance in the lengths of the loopback paths of the same symmetrical feedback (de)multiplexer is demonstrated to achieve wavelength modulation of the (de)multiplexed transmission responses that are useful for the (de)multiplexing of different bandwidth channels. Several newly introduced IIR feedback architectures are demonstrated to function similarly as their counterparts of FIR forward-path processors as binary bandwidth variable (de)multiplexers, envelope and wavelength modulation (de)multiplexers, and universal feedback processors. The investigation provided in this thesis is also supported with dynamic zero-pole evolution analysis in the complex plane of analysis of the studied FIR and IIR photonic processors to enhance understanding the principle of operation. This research expands the prospective for constructing innovative silicon-on-insulator (SOI) based optical processors for applications in modern optical communication systems and programmable elastic optical networks (EONs).