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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Low Power¡BHigh Performance¡B1.2V 10bits 100-MS/s Sample and Hold Circuit in a 0.09£gm CMOS Technology

Liu, Tu-tang 05 August 2008 (has links)
The digital product increases widely and vastly. We need a converter to change analog signal to digital one. However, the requirement of analog-to-digital converter is rising due to progress of DSP (Digital Signal Processor). In most ADC structure there have an important building block called the front-end sample-and-hold circuit (SHA) . I will design and implement a high speed and low power sample and hold circuit. In this thesis, the circuits are designed with UMC 90nm 1P9M CMOS process and 1.2V of supply voltage. The speed and resolution of SHA are 100Ms/s and 10bits individually. The circuit is implemented with class AB amplifier.
2

A Low-Power 12bits 150-MS/s Pipelined Asynchronous Successive Approximation Analog-to-Digital Converter

Yen, Yu-Wen 15 February 2011 (has links)
In this thesis, the circuits are designing with TSMC.18£gm CMOS process and 1.8V of supply voltage. The speed and resolution of ADC are 150MS/s and 12-bits individually. In order to achieve a high speed, low power consumption pipelined ADC. The proposed pipelined stage is replaced Flash ADC by SAR ADC and add an extra comparator to determine one additional bit in sampling phase of pipelined stage. This technique reduces large number of pipelined stage and opamp which is energy-hungry in the pipelined ADC. Second, the SAR ADC provides inherent sample-and-hold mechanism so that the front-end sample-and-hold amplifier circuit is non-need. Third, the SAR ADC can achieve rail-to-rail input signal swing and improve the conversion accuracy rather than Flash ADC. The dynamic comparator is used for lower power consumption for whole circuit. Furthermore, this pipelined ADC implement under a supply voltage as low as 1.8V. The bootstrapped switch is used for controlling the sampling in the front-end. It can reduce the impacts of linearity for operating under low supply voltage. The operation amplifier implement by the partially switched-opamp technique to reduce more power consumption. Finally, the output codes are translated by digital correction circuit, it enhance the comparators input offset error tolerance.
3

High-Speed and Low-Power Techniques for Successive-Approximation-Register Analog-to-Digital Converters

Swindlehurst, Eric Lee 01 April 2020 (has links)
Broadband wireless communication systems demand power-efficient analog-to-digital converters (ADCs) in the GHz and medium resolution regime. While high-speed architectures such as the flash and pipelined ADCs are capable of GHz operations, their high-power consumption reduces their attractiveness for mobile applications. On the other hand, the successive-approximation-register (SAR) ADC has an excellent power efficiency, but its slow speed has traditionally limited it to MHz applications. This dissertation puts forth several novel techniques to significantly increase the speed and power efficiency of the SAR architecture and demonstrates them in a low-power 10-GHz SAR ADC suitable for broadband wireless communications. The proposed 8-bit, 10-GHz, 8× time-interleaved SAR ADC utilizes a constant-matching DAC with symmetrically grouped unit finger capacitors to maximize speed by reducing the total DAC capacitance to 32 fF and minimizing the bottom plate parasitic capacitance. The capacitance reduction also saves power as both the DAC size and the driving logic size are reduced. An optimized asynchronous comparator loop and smaller driver logic push the single channel speed of the SAR ADC to 1.25 GHz, thus minimizing the total number of timeinterleaved channels to 8 to reach 10 GHz. A dual-path bootstrapped switch improves the spurious-free dynamic range (SFDR) of the sampling by creating an auxiliary path to drive the non-linear N-well capacitance apart from the main signal path. Using these techniques, the ADC achieves a measured signal-to-noise-and-distortion ratio (SNDR) and SFDR of 36.9 dB and 59 dB, respectively with a Nyquist input while consuming 21 mW of power. The ADC demonstrates a record-breaking figure-of-merit of 37 fJ/conv.-step, which is more than 2× better than the next best published design, among reported ADCs of similar speeds and resolutions.
4

Αποτελεσματικότητα τεχνολογιών υγείας / Health technology efficiency

Παπαθανασόπουλος, Φώτιος 05 July 2012 (has links)
Η παρούσα διατριβή έχει στόχο τη διερεύνηση της επίδρασης της νέας ιατρικής τεχνολογίας στην αποτελεσματικότητα παραγωγής των Μονάδων Εντατικής Θεραπείας (ΜΕΘ) στην Ελλάδα, καθώς και τον εντοπισμό των στοιχείων που επηρεάζουν τη διαδικασία λήψης αποφάσεων στο πλαίσιο του Εθνικού Συστήματος Υγείας (ΕΣΥ) για την υιοθέτηση ιατρικής τεχνολογίας. Για την εκτίμηση της αποτελεσματικότητας κάθε μονάδας, εφαρμόζεται η τεχνική bootstrapped DEA των Simar και Wilson (2007), ενώ για την διερεύνηση των στοιχείων που οδηγούν στην απόφαση υιοθέτησης γίνεται χρήση υποδειγμάτων probit. Κατόπιν, με τη χρήση υποδειγμάτων επιβίωσης εντοπίζονται οι παράγοντες που κατηγοριοποιούν τις Νοσοκομειακές μονάδες αναφορικά με το χρόνο υιοθέτησης. Ο αξονικός τομογράφος στα δημόσια νοσοκομεία χρησιμοποιείται σαν μελέτη περίπτωσης. Η μελέτη κατέδειξε ελλείμματα τόσο στην τεχνική αποτελεσματικότητα όσο και στην αποτελεσματικότητα κλίμακας στις περισσότερες μονάδες που εξετάστηκαν, κυρίως λόγω έλλειψης νοσηλευτικού προσωπικού. Τα αποτελέσματα δείχνουν ότι αν και η τεχνική αποτελεσματικότητα επωφελείται από την ενσωμάτωση των νέων ιατρικών τεχνολογιών, η αποτελεσματικότητα κλίμακας παραμένει ανεπηρέαστη. Αναφορικά με το την πιθανότητα και το χρόνο υιοθέτησης, διαπιστώθηκε ότι το μέγεθος του νοσοκομείου και η πληρότητα επιδρούν θετικά. Τέλος, τα συμπεράσματα επεξηγούν το βαθμό στον οποίο η υιοθέτηση νέας τεχνολογίας επηρεάζει τόσο την αποτελεσματικότητα των Νοσοκομειακών μονάδων γενικότερα, όσο και τη διαδικασία λήψης σχετικών αποφάσεων. Η παρούσα Διατριβή συμβάλλει στην γενικότερη ανάπτυξη της αποτελεσματικότητας του Συστήματος Υγείας και στην προώθηση του διαλόγου μεταξύ των εμπλεκόμενων στα θέματα διοίκησης και διαχείρισης του Συστήματος Υγείας. / This thesis aims to investigate the effect of new medical technology on the production efficiency of Intensive Care Units (ICUs) in Greece and unravel the elements which influence the decision making process concerning the adoption of new medical technologies in the context of the Greek Health System. In order to evaluate the efficiency of each Unit, the bootstrapped DEA of Simar and Wilson (2007) is applied, while a probit model is used for exploring the elements that lead to the adoption decision. Then, the factors that categorize hospitals regarding the timing of adoption are identified through the use of survival models. Computerized tomography in the Greek public sector is used as a case study. The study demonstrated deficits in both technical and scale efficiency in most Units, mainly due to lack of nursing staff. The results show that while technical efficiency has benefited from new medical technology integration, the scale efficiency remains unaffected. With respect to the likelihood and the time of adoption, it was found that the hospital’s size and plenitude have positive impact. Finally, the findings explain the extent to which health technology adoption affects both the hospital’s efficiency and the decision-making process. The present thesis contributes to the overall increase of the Health System efficiency as well as in promoting the dialogue between health administrators.
5

Feature Selection under Multicollinearity & Causal Inference on Time Series

Bhattacharya, Indranil January 2017 (has links) (PDF)
In this work, we study and extend algorithms for Sparse Regression and Causal Inference problems. Both the problems are fundamental in the area of Data Science. The goal of regression problem is to nd out the \best" relationship between an output variable and input variables, given samples of the input and output values. We consider sparse regression under a high-dimensional linear model with strongly correlated variables, situations which cannot be handled well using many existing model selection algorithms. We study the performance of the popular feature selection algorithms such as LASSO, Elastic Net, BoLasso, Clustered Lasso as well as Projected Gradient Descent algorithms under this setting in terms of their running time, stability and consistency in recovering the true support. We also propose a new feature selection algorithm, BoPGD, which cluster the features rst based on their sample correlation and do subsequent sparse estimation using a bootstrapped variant of the projected gradient descent method with projection on the non-convex L0 ball. We attempt to characterize the efficiency and consistency of our algorithm by performing a host of experiments on both synthetic and real world datasets. Discovering causal relationships, beyond mere correlation, is widely recognized as a fundamental problem. The Causal Inference problems use observations to infer the underlying causal structure of the data generating process. The input to these problems is either a multivariate time series or i.i.d sequences and the output is a Feature Causal Graph where the nodes correspond to the variables and edges capture the direction of causality. For high dimensional datasets, determining the causal relationships becomes a challenging task because of the curse of dimensionality. Graphical modeling of temporal data based on the concept of \Granger Causality" has gained much attention in this context. The blend of Granger methods along with model selection techniques, such as LASSO, enables efficient discovery of a \sparse" sub-set of causal variables in high dimensional settings. However, these temporal causal methods use an input parameter, L, the maximum time lag. This parameter is the maximum gap in time between the occurrence of the output phenomenon and the causal input stimulus. How-ever, in many situations of interest, the maximum time lag is not known, and indeed, finding the range of causal e ects is an important problem. In this work, we propose and evaluate a data-driven and computationally efficient method for Granger causality inference in the Vector Auto Regressive (VAR) model without foreknowledge of the maximum time lag. We present two algorithms Lasso Granger++ and Group Lasso Granger++ which not only constructs the hypothesis feature causal graph, but also simultaneously estimates a value of maxlag (L) for each variable by balancing the trade-o between \goodness of t" and \model complexity".

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