Due to increasing concerns on the power quality, power factor correction (PFC) has become an important issue in light-emitting diode (LED) lighting applications. A boost converter is one of the most well-known PFC topologies, due to its simple circuitry, simple control scheme and small number of passive components. Even though a boost converter is recognized as a typical PFC converter, its output voltage must be higher than its input voltage. This feature is disadvantageous because the device requires an additional buck-stage for LED lighting systems. As an alternative to the boost converter, a single-ended primary-inductor converter (SEPIC) allows output voltage to be lower or higher than the input voltage. Thus, the SEPIC converter is gaining popularity as a LED driver because it does not require additional power conversion stage. However, designing a controller to meet stability requirements and international standards is quite challenging for SEPIC converters. Additionally, if the digital controller is adopted for its built-in communication features, creating a digitally controlled SEPIC converter would be even more challenging. This thesis focuses on the state-space averaging modeling of the SEPIC PFC converter and the design of controllers based on both analog and digital controls with precise modeling. The proposed SEPIC converter incorporates RC damping circuits to avoid the instability, and thus the entire SEPIC converter becomes a 5th order system. Such a high-order system model was derived mathematically and verified with circuit simulator modeling. After verification of the circuit model, the controller was designed with analog transfer functions and converted to and the discrete domain for digital controller implementation. A 150-W single-switch bridgeless SEPIC PFC converter prototype was built accordingly to verify the design. In addition to the current loop controller design for stability, a feed-forward compensator for is introduced and derived for better waveform quality. Simulation results and experiment results are also presented to verify the complete controller with feed-forward compensation. The Texas Instruments (TI) digital signal processor (DSP) TMS320F28335 was adopted for digital controller implementation. For comparison purpose, the TI UC3854 controller was implemented to verify the analog controller design results. / Master of Science

With the development of information technology, power management for telecom and computer applications become a large market for power supply industries. To meet the performance and reliability requirement, distributed power system (DPS) is widely adopted for telecom and computer systems, because of its modularity, maintainability and high reliability. Due to limited space and increasing power consumption, power supplies for telecom and server systems are required to deliver more power with smaller volume. As the key component of DPS system, front-end AC/DC converter is under the pressure of continuously increasing power density. For conventional industry practices, some limitations prevents front-end converter meeting the power density requirement. In this dissertation, different techniques have been investigated to improve power density of front-end AC/DC converters. For PFC stage, at low switching frequency, PFC inductor size is large and limits the power density. Although increasing switching frequency can dramatically reduce PFC inductor size, EMI filter size might be larger at higher switching frequency because of the change of noise spectrum. Since the relationship between EMI filter size and PFC switching frequency is unclear for industry, PFC circuits always operate with switching frequency lower than 150 kHz. Based on the EMI filter design method, together with a simple EMI noise prediction model, relationship between EMI filter corner frequency and PFC switching frequency was revealed. The analysis shows that switching frequency of PFC circuit should be higher than 400 kHz, so that both PFC inductor and EMI filter size can be reduced. Although theoretical analysis and experimental results verify the benefits of high switching frequency PFC, it is essential to find a suitable topology that allows high switching frequency operation while maintains high efficiency. Three PFC topologies, single switch PFC, three-level PFC with range switch and dual Boost PFC, were evaluated with analysis and experiments. By using advanced semiconductor devices, together with proposed control methods, these topologies could achieve high efficiency at high switching frequency. Thus, the benefits of high frequency PFC can be realized. In front-end converter, large holdup time capacitor size is another barrier for power density improvement. To meet the holdup time requirement, bulky holdup time capacitor is normally used to provide energy during holdup time. Holdup time capacitor requirement can be reduced by using wider input voltage range DC/DC converte. Because LLC resonant converter can realized with input voltage range without sacrificing its normal operation efficiency, it becomes an attractive solution for DC/DC stage of front-end converters. Moreover, its small switching loss allows it operating at MHz switching frequency and achieves smaller passive component size. However, lack of design methodology makes the topology difficult to be implemented. An optimal design methodology for LLC resonant converter has been developed based on the analysis on the circuit during normal operation condition and holdup time. The design method is verified by a 1 MHz switching frequency LLC resonant converter with 76W/in3 power density. When front-end converter operates at high switching frequency, negative effects of circuit parasitics become more pronounced. By integrating active devices together with their gate drivers, Active Integrated power electronics module (IPEM) can largely reduce circuit parasitics. Therefore, switching loss and voltage stress on switching devices can be reduced. Moreover, IPEM concept can be extended into passive integration and EMI filter integration By using this power integration technology, power density and circuit performance of front-end converter can be improved, which is verified by theoretical analysis and experimental results. / Ph. D.