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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

Fast error detection with coverage guarantees for concurrent software

Coons, Katherine Elizabeth 04 October 2013 (has links)
Concurrency errors are notoriously difficult to debug because they may occur only under unexpected thread interleavings that are difficult to identify and reproduce. These errors are increasingly important as recent hardware trends compel developers to write more concurrent software and to provide more concurrent abstractions. This thesis presents algorithms that dynamically and systematically explore a program's thread interleavings to manifest concurrency bugs quickly and reproducibly, and to provide precise incremental coverage guarantees. Dynamic concurrency testing tools should provide (1) fast response -- bugs should manifest quickly if they exist, (2) reproducibility -- bugs should be easy to reproduce and (3) coverage -- precise correctness guarantees when no bugs manifest. In practice, most tools provide either fast response or coverage, but not both. These goals conflict because a program's thread interleavings exhibit exponential state- space explosion, which inhibits fast response. Two approaches from prior work alleviate state-space explosion. (1) Partial-order reduction provides full coverage by exploring only one interleaving of independent transitions. (2) Bounded search provides bounded coverage by enumerating only interleavings that do not exceed a bound. Bounded search can additionally provide guarantees for cyclic state spaces for which dynamic partial-order reduction provides no guarantees. Without partial-order reduction, however, bounded search wastes most of its time exploring executions that reorder only independent transitions. Fast response with coverage guarantees requires both approaches, but prior work failed to combine them soundly. We combine bounded search with partial-order reduction and extensively analyze the space of dynamic, bounded partial-order reduction strategies. First, we prioritize with a best-first search and show that heuristics that combine these approaches find bugs quickly. Second, we restrict partial-order reduction to combine approaches while maintaining bounded coverage. We specialize this approach for several bound functions, prove that these algorithms guarantee bounded coverage, and leverage dynamic information to further reduce the state space. Finally, we bound the partial order on a program's transitions, rather than the total order on those transitions, to combine these approaches without sacrificing partial-order reduction. This algorithm provides fast response, incremental coverage guarantees, and reproducibility. We manifest bugs an order of magnitude more quickly than previous approaches and guarantee incremental coverage in minutes or hours rather than weeks, helping developers find and reproduce concurrency errors. This thesis makes bounded stateless model checking for concurrent programs substantially more efficient and practical. / text
12

KFusion: obtaining modularity and performance with regards to general purpose GPU computing and co-processors

Kiemele, Liam 14 December 2012 (has links)
Concurrency has recently come to the forefront of computing as multi-core processors become more and more common. General purpose graphics processing unit computing brings with them new language support for dealing with co-processor environments such as OpenCL and CUDA. Programming language support for multi-core architectures introduces a fundamentally new mechanism for modularity--a kernel. Developers attempting to leverage these mechanism to separate concerns often incur unanticipated performance penalties. My proposed solution aims to preserve the benefits of kernel boundaries for modularity, while at the same time eliminate these inherent costs at compile time and execution. KFusion is a prototype tool for transforming programs written in OpenCL to make them more efficient. By leveraging loop fusion and deforestation, it can eliminate the costs associated with compositions of kernels that share data. Case studies show that Kfusion can address key memory bandwidth and latency bottlenecks and result in substantial performance improvements. / Graduate
13

Parallel discrete event simulation

Kalantery, Nasser January 1994 (has links)
No description available.
14

Formalising and reasoning about fudgets

Taylor, Colin J. January 1998 (has links)
No description available.
15

Design and Implementation of CMT in Real-time : Evaluation based on scheduling mechanisms

Nagathota, Hadassah Pearlyn January 2015 (has links)
Context: Standard transport layer protocols like UDP, TCP, andSCTP use only one access technology at a time. Concurrent MultipathTransmission (CMT), has been developed for parallel use of the access technologies. The main theme of this thesis work is to implement CMT in real-time and evaluate the impact of various scheduling algorithms on its performance. Objectives: The main objectives of this thesis are to implement a de-multiplexer at the source, re-sequencer at the receiver and to investigate some of the heuristics and analyzing their impact based on some performance metrics. Methods: Thorough understanding on this topic is attained by literature review of related works. To implement and evaluate the different scheduling patterns an experimental test bed is set up. For thetransmission of data, socket programming in Python is used. Varying various parameters that are involved in the experiment, performance metrics were measured and based on them statistical analysis is carried out for proper evaluation. Results: CMT is implemented in real-time test bed and concurrency is validated. Weighted Round-Robin has better performance compared to that of Round-Robin when the size of the packet is large whereas both exhibit nearly same behavior for smaller packet sizes. Conclusions: It can be concluded that Weighted Round-Robin attains higher throughput. It can be possibly due to more load of fragmentation when large packets are transmitted on the high reliable path and hence better performance than Round-Robin. There is need for further evaluation of other metrics like delay, jitter and using other scheduling mechanisms and in other environments as well.
16

A FAMILY OF HIERARCHICAL CONCURRENCY CONTROL PROTOCOLS

Xiong, Weidong 01 August 2018 (has links)
In this thesis, we propose a family of concurrency control protocols for high data contention database environments. The first one is called the Prudent-Precedence Concurrency Control (PPCC) protocol. It is prudently more aggressive in permitting more serializable schedules than two-phase locking and maintains a restricted precedence among conflicting transactions and commits the transactions according to the serialization order established in the executions. The second one is a family of hierarchical concurrency control protocols called the Hierarchical Precedence Concurrency Control (HPCC) protocols. It maintains cycle-free precedence hierarchies for conflicting transactions. Conflicting operations are allowed to proceed only if the hierarchical orderings of precedence is not violated. Transactions also commit based on the serialization order established during the executions. Detailed simulation models have been implemented for all these protocols and extensive experiments have been conducted to evaluate the performance of the proposed approaches. The results demonstrate that the proposed algorithms outperform the two-phase locking and optimistic concurrency control over a wide range of system workloads.
17

Concurrent Implementation of Packet Processing Algorithms on Network Processors

Groves, Mark January 2006 (has links)
Network Processor Units (NPUs) are a compromise between software-based and hardwired packet processing solutions. While slower than hardwired solutions, NPUs have the flexibility of software-based solutions, allowing them to adapt faster to changes in network protocols. <br /><br /> Network processors have multiple processing engines so that multiple packets can be processed simultaneously within the NPU. In addition, each of these processing engines is multi-threaded, with special hardware support built in to alleviate some of the cost of concurrency. This hardware design allows the NPU to handle multiple packets concurrently, so that while one thread is waiting for a memory access to complete, another thread can be processing a different packet. By handling several packets simultaneously, an NPU can achieve similar processing power as traditional packet processing hardware, but with greater flexibility. <br /><br /> The flexibility of network processors is also one of the disadvantages associated with them. Programming a network processor requires an in-depth understanding of the hardware as well as a solid foundation in concurrent design and programming. This thesis explores the challenges of programming a network processor, the Intel IXP2400, using a single-threaded packet scheduling algorithm as a sample case. The algorithm used is a GPS approximation scheduler with constant time execution. The thesis examines the process of implementing the algorithm in a multi-threaded environment, and discusses the scalability and load-balancing aspects of such an algorithm. In addition, optimizations are made to the scheduler implementation to improve the potential concurrency. The synchronization primitives available on the network processor are also examined, as they play a significant part in minimizing the overhead required to synchronize memory accesses by the algorithm.
18

Using Discrete-Event Systems for the Automatic Generation of Concurrency Control for Dynamic Threads

Auer, Anthony 28 May 2010 (has links)
The application of Discrete-Event Systems (DES) theory to the problem of guar- anteeably enforcing concurrency constraints in multi-threaded applications has been studied under certain assumptions, namely, the assumption of a static pool of pre- existing instantiated threads, whose creation and termination are not modelled. This work proposes an extension of this case to handle dynamically instantiated and termi- nated threads using a Petri net formalism and an online limited-lookahead state-space search technique. / Thesis (Master, Computing) -- Queen's University, 2010-05-27 17:00:15.99
19

Weak-memory local reasoning

Wehrman, Ian Anthony 15 February 2013 (has links)
Program logics are formal logics designed to facilitate specification and correctness reasoning for software programs. Separation logic, a recent program logic for C-like programs, has found great success in automated verification due in large part to its embodiment of the principle of local reasoning, in which specifications and proofs are restricted to just those resources—variables, shared memory addresses, locks, etc.—used by the program during execution. Existing program logics make the strong assumption that all threads agree on the values of shared memory at all times. But, on modern computer architectures, this assumption is unsound for certain shared-memory concurrent programs: namely, those with races. Typically races are considered to be errors, but some programs, like lock-free concurrent data structures, are necessarily racy. Verification of these difficult programs must take into account the weaker models of memory provided by the architectures on which they execute. This dissertation project seeks to explicate a local reasoning principle for x86-like architectures. The principle is demonstrated with a new program logic for concurrent C-like programs that incorporates ideas from separation logic. The goal of the logic is to allow verification of racy programs like concurrent data structures for which no general-purpose high-level verification techniques exist. / text
20

A Study of Conflict Detection in Software Transactional Memory

Lupei, Daniel 15 February 2010 (has links)
Transactional Memory (TM) has been proposed as a simpler parallel programming model compared to the traditional locking model. However, uptake from the programming community has been slow, primarily because performance issues of software-based TM strategies are not well understood. In this thesis we conduct a systematic analysis of conflict scenarios that may emerge when enforcing correctness between conflicting transactions. We find that some combinations of conflict detection and resolution strategies perform better than others depending on the conflict patterns in the application. We validate our findings by implementing several concurrency control strategies, and by measuring their relative performance. Based on these observations, we introduce partial rollbacks as a mechanism for effectively compensating the variability in the TM algorithm performance. We show that using this mechanism we can obtain close to the overall best performance for a range of conflict patterns in a synthetically generated workload and a realistic game application.

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