4H-SiC-based bipolar junction transistors (BJTs) are attractive devices for high-voltage and high-temperature operations due to their high current capability, low specific on-resistance, and process simplicity. To extend the potential of SiC BJTs to power electronic industrial applications, it is essential to realize high-efficient devices with high-current and low-loss by a reliable and wafer-scale fabrication process. In this thesis, we focus on the improvement of the 4H-SiC BJT performance, including the device optimization and process development. To optimize the 4H-SiC BJT design, a comprehensive study in terms of cell geometries, device scaling, and device layout is performed. The hexagon-cell geometry shows 42% higher current density and 21% lower specific on-resistance at a given maximum current gain compared to the interdigitated finger design. Also, a layout design, called intertwined, is used for 100% usage of the conducting area. A higher current is achieved by saving the inactive portion of the conducting area. Different multi-step etched edge termination techniques with an efficiency of &gt;92% are realized. Regarding the process development, an improved surface passivation is used to reduce the surface recombination and improve the maximum current gain of 4H-SiC BJTs. Moreover, wafer-scale lift-off-free processes for the n- and p-Ohmic contact technologies to 4H-SiC are successfully developed. Both Ohmic metal technologies are based on a self-aligned Ni-silicide (Ni-SALICIDE) process. Regarding the device characterization, a maximum current gain of 40, a specific on-resistance of 20 mΩ·cm2, and a maximum breakdown voltage of 5.85 kV for the 4H-SiC BJTs are measured. By employing the enhanced surface passivation, a maximum current gain of 139 and a specific on-resistance of 579 mΩ·cm2 at the current density of 89 A/cm2 for the 15-kV class BJTs are obtained. Moreover, low-voltage 4H-SiC lateral BJTs and Darlington pair with output current of 1−15 A for high-temperature operations up to 500 °C were fabricated. This thesis focuses on the improvement of the 4H-SiC BJT performance in terms of the device optimization and process development for high-voltage and high-temperature applications. The epilayer design and the device structure and topology are optimized to realize high-efficient BJTs. Also, wafer-scale fabrication process steps are developed to enable realization of high-current devices for the real applications. / <p>QC 20170810</p>

This master thesis is about current operational amplifiers and mainly about their internal structures and possible modifications of these structures. The Current operational amplifier consists of several elementary blocks and these blocks are shortly described and used in internal structures of proposed operational amplifiers. Basic elementary blocks of the current operational amplifier are current mirror, diferentional amplifier, current source, transimpedation amplifier and additional elements of a circuit. In this thesis, several elementary structures of the operational amplifiers are introduced. Each amplifier passed through the analysis of the circuit in software MicroCap 9.0. In this software is done the simple DC analysis of the internal structure of the current operational amplifier in connection with a feedback. The solution was focused on bipolar and unipolar technology for each connection. I deal with a method of feedback connection to the operational amplifier and explore real characteristic of the appropriate amplifier in the designed feedback. In principle this design has important influence to the resulting properties of the circuit. Within the analysis of the circuits have been found, how each current operational amplifier works in a defined current range. Every type of surveyed amplifier is closely described, the internal structure is depicted and graph of current transmission of amplifier is shown. At the end of this thesis the amplifiers are compared and there are introduced their advantages and disadvantages.