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Computing on the Edge of the NetworkMehrabi, Mahshid 15 August 2022 (has links)
Um Systeme der fünften Generation zellularer Kommunikationsnetze (5G) zu ermöglichen, sind Energie effiziente Architekturen erforderlich, die eine zuverlässige Serviceplattform für die Bereitstellung von 5G-Diensten und darüber hinaus bieten können. Device Enhanced Edge Computing ist eine Ableitung des Multi-Access Edge Computing (MEC), das Rechen- und Speicherressourcen direkt auf den Endgeräten bereitstellt. Die Bedeutung dieses Konzepts wird durch die steigenden Anforderungen von rechenintensiven Anwendungen mit extrem niedriger Latenzzeit belegt, die den MEC-Server allein und den drahtlosen Kanal überfordern. Diese Dissertation stellt ein Berechnungs-Auslagerungsframework mit Berücksichtigung von Energie, Mobilität und Anreizen in einem gerätegestützten MEC-System mit mehreren Benutzern und mehreren Aufgaben vor, das die gegenseitige Abhängigkeit der Aufgaben sowie die Latenzanforderungen der Anwendungen berücksichtigt. / To enable fifth generation cellular communication network (5G) systems, energy efficient architectures are required that can provide a reliable service platform for the delivery of 5G services and beyond. Device Enhanced Edge Computing is a derivative of Multi-Access Edge Computing (MEC), which provides computing and storage resources directly on the end devices. The importance of this concept is evidenced by the increasing demands of ultra-low latency computationally intensive applications that overwhelm the MEC server alone and the wireless channel. This dissertation presents a computational offloading framework considering energy, mobility and incentives in a multi-user, multi-task device-based MEC system that takes into account task interdependence and application latency requirements.
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Analysis of Performance Instabilities of Hafnia-Based Ferroelectrics Using Modulus Spectroscopy and Thermally Stimulated Depolarization CurrentsFengler, Franz P. G., Nigon, Robin, Muralt, Paul, Grimley, Everett D., Sang, Xiahan, Sessi, Violetta, Hentschel, Rico, LeBeau, James M., Mikolajick, Thomas, Schroeder, Uwe 24 August 2022 (has links)
The discovery of the ferroelectric orthorhombic phase in doped hafnia films has sparked immense research efforts. Presently, a major obstacle for hafnia's use in high-endurance memory applications like nonvolatile random-access memories is its unstable ferroelectric response during field cycling. Different mechanisms are proposed to explain this instability including field-induced phase change, electron trapping, and oxygen vacancy diffusion. However, none of these is able to fully explain the complete behavior and interdependencies of these phenomena. Up to now, no complete root cause for fatigue, wake-up, and imprint effects is presented. In this study, the first evidence for the presence of singly and doubly positively charged oxygen vacancies in hafnia–zirconia films using thermally stimulated currents and impedance spectroscopy is presented. Moreover, it is shown that interaction of these defects with electrons at the interfaces to the electrodes may cause the observed instability of the ferroelectric performance.
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Low-Power Wake-Up ReceiversMa, Rui 04 July 2022 (has links)
The Internet of Things (IoT) is leading the world to the Internet of Everything (IoE), where things, people, intelligent machines, data and processes will be connected together. The key to enter the era of the IoE lies in enormous sensor nodes being deployed in the massively expanding wireless sensor networks (WSNs). By the year of 2025, more than 42 billion IoT devices will be connected to the Internet. While the future IoE will bring priceless advantages for the life of mankind, one challenge limiting the nowadays IoT from further development is the ongoing power demand with the dramatically growing number of the wireless sensor nodes.
To address the power consumption issue, this dissertation is motivated to investigate low-power wake-up receivers (WuRXs) which will significantly enhance the sustainability of the WSNs and the environmental awareness of the IoT.
Two proof-of-concept low-power WuRXs with focuses on two different application scenarios have been proposed. The first WuRX, implemented in a cost-effective 180-nm CMOS semiconductor technology, operates at 401−406-MHz band. It is a good candidate for application scenarios, where both a high sensitivity and an ultra-low power consumption are in demand. Concrete use cases are, for instance, medical implantable applications or long-range communications in rural areas. This WuRX does not rely on a further assisting semiconductor technology, such as MEMS which is widely used in state-of-the-art WuRXs operating at similar frequencies. Thus, this WuRX is a promising solution to low-power low-cost IoT. The second WuRX, implemented in a 45-nm RFSOI CMOS technology, was researched for short-range communication applications, where high-density conventional IoT devices should be installed. By investigation of the WuRX for operation at higher frequency band from 5.5 GHz to 7.5 GHz, the nowadays ever more over-traffic issues that arise at low frequency bands such as 2.4 GHz can be substantially addressed.
A systematic, analytical research route has been carried out in realization of the proposed WuRXs. The thesis begins with a thorough study of state-of-the-art WuRX architectures. By examining pros and cons of these architectures, two novel architectures are proposed for the WuRXs in accordance with their specific use cases. Thereon, key WuRX parameters are systematically analyzed and optimized; the performance of relevant circuits is modeled and simulated extensively. The knowledge gained through these investigations builds up a solid theoretical basis for the ongoing WuRX designs. Thereafter, the two WuRXs have been analytically researched, developed and optimized to achieve their highest performance.
Proof-of-concept circuits for both the WuRXs have been fabricated and comprehensively characterized under laboratory conditions. Finally, measurement results have verified the feasibility of the design concept and the feasibility of both the WuRXs.
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Design and Analysis of Low-power Millimeter-Wave SiGe BiCMOS Circuits with Application to Network Measurement SystemsZhang, Yaxin 20 June 2022 (has links)
Interest in millimeter (mm-) wave frequencies covering the spectrum of 30-300 GHz has been steadily increasing. Advantages such as larger absolute bandwidth and smaller form-factor have made this frequency region attractive for numerous applications, including high-speed wireless communication, sensing, material science, health, automotive radar, and space exploration. Continuous development of silicon-germanium heterojunction bipolar transistor (SiGe HBT) and associated BiCMOS technology has achieved transistors with fT/fmax of 505/720 GHz and integration with 55 nm CMOS. Such accomplishment and predictions of beyond THz performance have made SiGe BiCMOS technology the most competitive candidate for addressing the aforementioned applications.
Especially for mobile applications, a critical demand for future mm-wave applications will be low DC power consumption (Pdc), which requires a substantial reduction of supply voltage and current. Conventionally, reducing the supply voltage will lead to HBTs operating close to or in the saturation region, which is typically avoided in mm-wave circuits due to expectated performance degradation and often inaccurate models. However, due to only moderate speed reduction at the forward-biased base-collector voltage (VBC) up to 0.5 V and the accuracy of the compact model HICUM/L2 also in saturation, low-power mm-wave circuits with SiGe HBTs operating in saturation offer intriguing benefits, which have been explored in this thesis based on 130 nm SiGe BiCMOS technologies:
• Different low-power mm-wave circuit blocks are discussed in detail, including low-noise amplifiers (LNAs), down-conversion mixers, and various frequency multipliers covering a wide frequency range from V-band (50-75 GHz) to G-band (140-220 GHz).
• Aiming at realizing a better trade-off between Pdc and RF performance, a drastic decrease in supply voltage is realized with forward-biased VBC, forcing transistors of the circuits to operate in saturation.
• Discussions contain the theoretical analysis of the key figure of merits (FoMs), topology and bias selection, device sizing, and performance enhancement techniques.
• A 173-207 GHz low-power amplifier with 23 dB gain and 3.2 mW Pdc, and a 72-108 GHz low-power tunable amplifier with 10-23 dB gain and 4-21 mW Pdc were designed.
• A 97 GHz low-power down-conversion mixer was presented with 9.6 dB conversion gain (CG) and 12 mW Pdc.
• For multipliers, a 56-66 GHz low-power frequency quadrupler with -3.6 dB peak CG and 12 mW Pdc, and a 172-201 GHz low-power frequency tripler with -4 dB peak CG and 10.5 mW Pdc were realized. By cascading these two circuits, also a 176-193 GHz low-power ×12 multiplier was designed, achieving -11 dBm output power with only 26 mW Pdc.
• An integrated 190 GHz low-power receiver was designed as one receiving channel of a G-band frequency extender specifically for a VNA-based measurement system. Another goal of this receiver is to explore the lowest possible Pdc while keeping its highly competitive RF performance for general applications requiring a wide LO tuning range. Apart from the low-power design method of circuit blocks, the careful analysis and distribution of the receiver FoMs are also applied for further reduction of the overall Pdc. Along this line, this receiver achieved a peak CG of 49 dB with a 14 dB tunning range, consuming only 29 mW static Pdc for the core part and 171 mW overall Pdc, including the LO chain.
• All designs presented in this thesis were fabricated and characterized on-wafer. Thanks to the accurate compact model HICUM/L2, first-pass access was achieved for all circuits, and simulation results show excellent agreement with measurements.
• Compared with recently published work, most of the designs in this thesis show extremely low Pdc with highly competitive key FoMs regarding gain, bandwidth, and noise figure.
• The observed excellent measurement-simulation agreement enables the sensitivity analysis of each design for obtaining a deeper insight into the impact of transistor-related physical effects on critical circuit performance parameters. Such studies provide meaningful feedback for process improvement and modeling development.:Table of Contents
Kurzfassung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of symbols and acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Technology 7
2.1 Fabrication Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.1 SiGe HBT performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.2 B11HFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.3 SG13G2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.4 SG13D7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 Commonly Used Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.1 Grounded-sidewall-shielded microstrip line . . . . . . . . . . . . . . . . . . 12
2.2.2 Zero-impedance Transmission Line . . . . . . . . . . . . . . . . . . . . . . 15
2.2.3 Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2.3.1 Active Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2.3.2 Passive Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3 Low-power Low-noise Amplifiers 25
3.1 173-207 GHz Ultra-low-power Amplifier . . . . . . . . . . . . . . . . . . . . . . . 25
3.1.1 Topology Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1.2 Bias Dependency of the Small-signal Performance . . . . . . . . . . . . . 27
3.1.2.1 Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.1.2.2 Bias vs Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.1.2.3 Bias vs Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.1.2.4 Bias vs Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.1.3 Bias selection and Device sizing . . . . . . . . . . . . . . . . . . . . . . . . 36
3.1.3.1 Bias Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.1.3.2 Device Sizing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1.4 Performance Enhancement Technologies . . . . . . . . . . . . . . . . . . . 41
3.1.4.1 Gm-boosting Inductors . . . . . . . . . . . . . . . . . . . . . . . 41
3.1.4.2 Stability Enhancement . . . . . . . . . . . . . . . . . . . . . . . 43
3.1.4.3 Noise Improvement . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.1.5 Circuit Realization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.1.5.1 Layout Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.1.5.2 Inductors Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.1.5.3 Dual-band Matching Network . . . . . . . . . . . . . . . . . . . 48
3.1.5.4 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . 50
3.1.6 Results and Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.1.6.1 Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.1.6.2 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . 51
3.1.6.3 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.2 72-108 GHz Low-Power Tunable Amplifier . . . . . . . . . . . . . . . . . . . . . . 55
3.2.1 Configuration, Sizing, and Bias Tuning Range . . . . . . . . . . . . . . . . 55
3.2.2 Regional Matching Network . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.2.2.1 Impedance Variation . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.2.2.2 Regional Matching Network Design . . . . . . . . . . . . . . . . 60
3.2.3 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.2.4 Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.2.4.1 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.2.4.2 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4 Low-power Down-conversion Mixers 73
4.1 97 GHz Low-power Down-conversion Mixer . . . . . . . . . . . . . . . . . . . . . 74
4.1.1 Mixer Design and Implementation . . . . . . . . . . . . . . . . . . . . . . 74
4.1.1.1 Mixer Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.1.1.2 Bias Selection and Device Sizing . . . . . . . . . . . . . . . . . . 77
4.1.1.3 Mixer Implementation . . . . . . . . . . . . . . . . . . . . . . . . 79
4.1.2 Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.1.2.1 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . 80
4.1.2.2 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.2 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
5 Low-power Multipliers 87
5.1 General Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
5.2 56-66 GHz Low-power Frequency Quadrupler . . . . . . . . . . . . . . . . . . . . 89
5.3 172-201 GHz Low-power Frequency Tripler . . . . . . . . . . . . . . . . . . . . . 93
5.4 176-193 GHz Low-power ×12 Frequency Multiplier . . . . . . . . . . . . . . . . . 96
5.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
6 Low-power Receivers 101
6.1 Receiver Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
6.2 LO Chain (×12) Integrated 190 GHz Low-Power Receiver . . . . . . . . . . . . . 104
6.2.1 Receiver Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
6.2.2 Low-power Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
6.2.3 Building Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
6.2.3.1 LNA and LO DA . . . . . . . . . . . . . . . . . . . . . . . . . . 108
6.2.3.2 Tunable Mixer and IF BA . . . . . . . . . . . . . . . . . . . . . 111
6.2.3.3 65 GHz (V-band) Quadrupler . . . . . . . . . . . . . . . . . . . 116
6.2.3.4 G-band Tripler . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
6.2.4 Receiver Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . 123
6.2.5 Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
6.2.6 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
6.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
7 Conclusions 133
7.1 Summaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
7.2 Outlook . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Bibliography 135
List of Figures 149
List of Tables 157
A Derivation of the Gm 159
A.1 Gm of standard cascode stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
A.2 Gm of cascode stage with Lcas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
A.3 Gm of cascode stage with Lb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
B Derivation of Yin in the stability analysis 163
C Derivation of Zin and Zout 165
C.1 Zin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
C.2 Zout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
D Derivation of the cascaded oP1dB 169
E Table of element values for the designed circuits 171
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En route to automated maintenance of industrial printing systems: digital quantification of print-quality factors based on induced printing failureBischoff, Peter, Carreiro, André V., Kroh, Christoph, Schuster, Christiane, Härtling, Thomas 22 February 2024 (has links)
Tracking and tracing are a key technology for production process optimization and subsequent cost reduction. However, several industrial environments (e.g. high temperatures in metal processing) are challenging for most part-marking and identification approaches. A method for printing individual part markings on metal components (e.g. data matrix codes (DMCs) or similar identifiers) with high temperatures and chemical resistance has been developed based on drop-on-demand (DOD) print technology and special ink dispersions with submicrometer-sized ceramic and glass particles. Both ink and printer are required to work highly reliably without nozzle clogging or other failures to prevent interruptions of the production process in which the printing technology is used. This is especially challenging for the pigmented inks applied here. To perform long-term tests with different ink formulations and to assess print quality over time, we set up a test bench for inkjet printing systems. We present a novel approach for monitoring the printhead’s state as well as the print-quality degradation. This method does not require measuring and monitoring, e.g. electrical components or drop flight, as it is done in the state of the art and instead uses only the printed result. By digitally quantifying selected quality factors within the printed result and evaluating their progression over time, several non-stationary measurands were identified. Some of these measurands show a monotonic trend and, hence, can be used to measure print-quality degradation. These results are a promising basis for automated printing system maintenance.
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Efficient 3D Acoustic Simulation of the Vocal Tract by Combining the Multimodal Method and Finite ElementsBlandin, Rémi, Arnela, Marc, Félix, Simon, Doc, Jean-Baptiste, Birkholz, Peter 22 February 2024 (has links)
Acoustic simulation of sound propagation inside the vocal tract is a key element of speech research, especially for articulatory synthesis, which allows one to relate the physics of speech production to other fields of speech science, such as speech perception. Usual methods, such as the transmission line method, have a very low computational cost and perform relatively good up to 4-5 kHz, but are not satisfying above. Fully numerical 3D methods such as finite elements achieve the best accuracy, but have a very high computational cost. Better performances are achieved with the state of the art semi-analytical methods, but they cannot describe the vocal tract geometry as accurately as fully numerical methods (e.g. no possibility to take into account the curvature). This work proposes a new semi-analytical method that achieves a better description of the three-dimensional vocal-tract geometry while keeping the computational cost substantially lower than the fully numerical methods. It is a multimodal method which relies on two-dimensional finite elements to compute transverse modes and takes into account the curvature and the variations of crosssectional area. The comparison with finite element simulations shows that the same degree of accuracy (about 1% of difference in the resonance frequencies) is achieved with a computational cost about 10 times lower.
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Millimeter-Wave Super-Regenerative Receivers for Wireless Communication and RadarGhaleb, Hatem 29 November 2022 (has links)
Today’s world is becoming increasingly automated and interconnected with billions of smart devices coming online, leading to a steep rise in energy consumption from small microelectronics. This coincides with an urgent push to transform global energy production to green energies, causing disruptions and energy shortages, and making the case for efficient energy use ever more pressing. Two major areas where high growth is expected are the fields of wireless communication and radar sensors. Millimeter-wave frequency bands are planned for fifth-generation (5G) and sixth-generation (6G) cellular communication standards, as well as automotive frequency-modulated continuous wave (FMCW) radar systems for driving assistance and automation. Fast silicon-based technologies enable these advances by operating at high maximum frequencies, such as the silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technologies. However, even the fastest transistors suffer from low and energy expensive gains at millimeter-wave frequencies.
Rather than incremental improvements in circuit efficiency using conventional approaches, a disruptive revolution for green microelectronics could be enabled by exploring the low-power benefits of the super-regenerative receiver for some applications. The super-regenerative receiver uses a regenerative oscillator circuit to increase the gain by positive feedback, through coupling energy from the output back into the input. Careful bias and control of the circuit enables a very large gain from a small number of transistors and a very low energy dissipation. Thus, the super-regenerative oscillator could be used to replace amplifier circuits in high data rate wireless communication systems, or as active reflectors to increase the range of FMCW radar systems, greatly reducing the power consumption.
The work in this thesis presents fundamental scientific research into the topic of energy-efficient millimeter-wave super-regenerative receivers for use in civilian wireless communication and radar applications. This research work covers the theory, analysis, and simulations, all the way up to the proof of concept, hardware realization, and experimental characterization. Analysis and modeling of regenerative oscillator circuits is presented and used to improve the understanding of the circuit operation, as well as design goals according to the specific application needs. Integrated circuits are investigated and characterized as a proof of concept for a high data rate wireless communication system operating between 140–220 GHz, and an automotive radar system operating at 60 GHz. Amplitude and phase regeneration capabilities for complex modulation are investigated, and principles for spectrum characterization are derived. The circuits are designed and fabricated in a 130 nm SiGe HBT technology, combining bipolar and complementary metal-oxide semiconductor (BiCMOS) transistors.
To prove the feasibility of the research concepts, the work achieves a wireless communication link at 16 Gbit/s over 20 cm distance with quadrature amplitude modulation (QAM), which is a world record for the highest data rate ever reported in super-regenerative circuits. This was powered by a super-regenerative oscillator circuit operating at 180 GHz and providing 58 dB of gain. Energy efficiency is also considerably high, drawing 8.8 mW of dc power consumption, which corresponds to a highly efficient 0.6 pJ/bit. Packaging and module integration innovations were implemented for the system experiments, and additional broadband circuits were investigated to generate custom quench waveforms to further enhance the data rate. For radar active reflectors, a regenerative gain of 80 dB is achieved at 60 GHz from a single circuit, which is the best in its frequency range, despite a low dc power consumption of 25 mW.
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Electro-Photonic Transmitter Front-Ends for High-Speed Fiber-Optic CommunicationGiuglea, Alexandru 28 October 2022 (has links)
This thesis addresses basic scientific research in the field of transmitter front-end circuits for electro-optical data communication. First, the theoretical fundamentals are presented and analyzed. Based on the theoretical considerations, conceptual circuit designs are studied. Finally, in order to prove the described concepts, the circuits were experimentally characterized and subsequently compared to other works in the literature.
The analysis covers key theoretical aspects regarding transmitter front-end circuits. It starts from the basic physical effects inside a transistor and ends with the design of high-swing modulator drivers. Furthermore, it comprises the fundamentals of optical modulators as well as the integration of the electrical driver with the modulator.
First, the concept of a basic monolithically integrated transmitter consisting of a Mach-Zehnder modulator (MZM) and an electrical driver is presented. The circuit reaches a bit-error-free data rate of 37 Gb/s, which is a record among other monolithically integrated transmitters reported in the literature. It was shown that by employing a high-swing driver, high extinction ratios (ER) can be achieved (namely 8.4 dB at 25 Gb/s and 7.6 dB at 35 Gb/s) while using short-length phase shifters (2 mm of length). It was therefore proved that one of the main drawbacks of the MZM-based transmitters, namely their large chip area, can be mitigated by using high-swing drivers, however without sacrificing the ER.
Next, an improved modulator driver design is investigated, the focus of the study being the linearity. In addition to a high peak-to-peak differential output voltage swing of 7.2 Vpp,d, the driver achieves record-low total harmonic distortion (THD) values of 1% (at 1 GHz, for the output swing of 6.5 Vpp,d) and 1.7% (at 1 GHz, for the output swing of 7 Vpp,d). Moreover, the driver reaches a bandwidth of 61.2 GHz and shows a high power efficiency when relating its DC power consumption to its output voltage swing. The achievement of a high linearity and bandwidth without an increased power consumption is due to the fact that the bias currents of the emitter-follower (EF) stages are provided by means of resistors instead of the conventional current sources. The two approaches were first analyzed mathematically and subsequently compared by means of circuit simulations. It was shown that the proposed approach for the realization of the EFs – i.e. by means of resistors – allows a reduction of the DC power consumption by 19% compared to the current-source approach for an equivalent performance in terms of linearity and bandwidth.
Finally, a modulator driver concept suitable for higher-order modulation formats is studied, namely the 8-level pulse amplitude modulation (PAM-8). The circuit was realized as a 3-bit digital-to-analog converter (DAC), thus being able to yield 8-level output signals. Moreover, the circuit is able to function as a PAM-4 driver as well, thanks to the tunable tail currents of the DAC core. It achieves a symbol rate of 50 Gbaud, which corresponds to a bit rate of 150 Gb/s for the PAM-8 modulation and 100 Gb/s for PAM-4. The study showed that a modulator driver can be realized that is able to switch between different modulation formats (namely PAM-8 and PAM-4), without requiring extra power or additional circuit parts. Moreover, the use of on-chip single-to-differential converters (SDCs) targets the relaxation of the requirements on the stages that precede the driver. Finally, relating its DC power consumption (590 mW, including the SDCs) to its output voltage swing (4 Vpp,d), the driver shows one of the highest power efficiencies among PAM modulator drivers in the literature.
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Zero-padding Network Coding and Compressed Sensing for Optimized Packets TransmissionTaghouti, Maroua 04 November 2022 (has links)
Ubiquitous Internet of Things (IoT) is destined to connect everybody and everything on a never-before-seen scale. Such networks, however, have to tackle the inherent issues created by the presence of very heterogeneous data transmissions over the same shared network. This very diverse communication, in turn, produces network packets of various sizes ranging from very small sensory readings to comparatively humongous video frames. Such a massive amount of data itself, as in the case of sensory networks, is also continuously captured at varying rates and contributes to increasing the load on the network itself, which could hinder transmission efficiency. However, they also open up possibilities to exploit various correlations in the transmitted data due to their sheer number. Reductions based on this also enable the networks to keep up with the new wave of big data-driven communications by simply investing in the promotion of select techniques that efficiently utilize the resources of the communication systems. One of the solutions to tackle the erroneous transmission of data employs linear coding techniques, which are ill-equipped to handle the processing of packets with differing sizes. Random Linear Network Coding (RLNC), for instance, generates unreasonable amounts of padding overhead to compensate for the different message lengths, thereby suppressing the pervasive benefits of the coding itself. We propose a set of approaches that overcome such issues, while also reducing the decoding delays at the same time. Specifically, we introduce and elaborate on the concept of macro-symbols and the design of different coding schemes. Due to the heterogeneity of the packet sizes, our progressive shortening scheme is the first RLNC-based approach that generates and recodes unequal-sized coded packets. Another of our solutions is deterministic shifting that reduces the overall number of transmitted packets. Moreover, the RaSOR scheme employs coding using XORing operations on shifted packets, without the need for coding coefficients, thus favoring linear encoding and decoding complexities.
Another facet of IoT applications can be found in sensory data known to be highly correlated, where compressed sensing is a potential approach to reduce the overall transmissions. In such scenarios, network coding can also help. Our proposed joint compressed sensing and real network coding design fully exploit the correlations in cluster-based wireless sensor networks, such as the ones advocated by Industry 4.0. This design focused on performing one-step decoding to reduce the computational complexities and delays of the reconstruction process at the receiver and investigates the effectiveness of combined compressed sensing and network coding.
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Teilentladungsverhalten von Gas-Feststoff-Isoliersystemen unter GleichspannungsbelastungGötz, Thomas 05 October 2022 (has links)
Das kompakte Design von gasisolierten Systemen und die Unabhängigkeit gegenüber Umgebungsbedingungen führt zu einer idealen Eignung des Betriebsmittels für den Einsatz in modernen Energieversorgungssystemen. Ein Betrieb der Anlagen unter Gleichspannungsbelastung ist dabei aufgrund der zunehmenden räumlichen Distanz zwischen Erzeugungs- und Verbrauchszentren unumgänglich. Der sichere Betrieb über die geplante Lebensdauer von mehreren Jahrzehnten ist nur mit einer genauen Teilentladungsdiagnose, welche eine sensitive Messung und zweifelsfreie Interpretation der Ergebnisse beinhaltet, möglich. Dabei ist zu beachten, dass die von Wechselspannungsanwendungen bekannten physikalischen Zusammenhänge der Entladungsprozesse und des Einflusses von dielektrischen Grenzflächen aufgrund der veränderten Belastung mit einem zeitlich konstanten elektrischen Feld und der damit einhergehenden Raum- und Oberflächenladungsakkumulation nicht direkt übernommen werden können.
Ziel dieser Arbeit ist daher die Entladungsprozesse an Defekten mit und ohne dielektrischer Grenzfläche in gasisolierten Gleichspannungssystemen zu analysieren und damit einen Beitrag für die sichere Interpretation von Teilentladungsmessungen zu leisten. Auch werden bekannte elektrische und neuartige optische Messmethoden hinsichtlich ihrer Möglichkeiten und Grenzen beim Einsatz unter Gleichspannungsbelastung untersucht. Für die experimentellen Arbeiten an drei verschiedenen Störstellen wird das schwach inhomogene Isoliersystem der Anlagen in drei Modellanordnungen nachgebildet. Die Untersuchung der ablaufenden Entladungsprozesse wird durch eine direkte Messung des Teilentladungsstroms ermöglicht. Dabei wird zwischen impulsbehafteten und impulslosen Anteilen unterschieden.
Infolge von Montagefehlern oder unzureichender Materialqualität können feste, metallische Störstellen im Isoliersystem entstehen. Die experimentell betrachteten Abhängigkeiten der Entladungsprozesse von der Störstellenpolarität, dem Isoliergasdruck und der Spannungsbelastung erlauben eine Klassifizierung von vier verschiedenen Entladungsarten. Zusätzlich zu den Untersuchungen im derzeit am häufigsten verwendeten Isoliergas Schwefelhexafluorid konnte ein Vergleich der Ergebnisse mit der klimafreundlichen alternative synthetische Luft die Gemeinsamkeiten und Unterschiede bei Entladungen an festen Störstellen aufzeigen. Dabei ist insbesondere die signifikant veränderte Polaritätsabhängigkeit hervorzuheben.
Der Kontakt von metallischen Partikeln mit der Feststoffisolierung kann zur Anlagerung des zuvor freibeweglichen, metallischen Defektes an der dielektrischen Grenzfläche führen. Die Ansammlung von Oberflächenladungen auf dem Feststoff beeinflusst dabei insbesondere den Entladungseinsatz. Aufgrund des zur festen metallischen Störstelle ohne Grenzfläche vergleichbaren Entladungsverhaltens im stationären Zustand ist eine Unterscheidung der Defekte anhand von Impulswiederholraten und Amplituden herausfordernd.
Eine Besonderheit bei Gleichspannungsbelastung sind Entladungen, welche auf einer Gas-Feststoff-Quergrenzfläche an beschichteten Elektroden einsetzen können. Die Untersuchung der Ursachen für das Auftreten dieser Entladungen, die elektrischen und optischen Charakteristika der ablaufenden Prozesse und Strategien für die Vermeidung werden untersucht.
Aus den Ergebnissen werden Prüfempfehlungen für die Teilentladungsdiagnose von gasisolierten Gleichspannungssystemen abgeleitet. Diese sind wesentlicher Bestandteil für einen zukünftigen Einsatz gasisolierter Gleichspannungssysteme in einem leistungsfähigen Elektroenergiesystem mit hoher Versorgungszuverlässigkeit. / The compact design and the independence from environmental conditions of gas-insulated systems leads to an ideal suitability of this high-voltage equipment for the use in a modern power supply system. The operation of the assets under DC voltage stress is unavoidable due to the increasing distance between the areas of power generation and consumption. The reliable operation during the estimated lifetime of several decades is only feasible with a precise partial discharge diagnosis. Hence, a sensitive measurement and a doubtless interpretation of the results is necessary. Nevertheless, it is necessary to take into account, that under alternating voltage stress established physical mechanisms of the discharge processes and the influence of dielectric interfaces cannot be adopted directly, due to the changed voltage stress with a constant electric field and the related surface and volume charge accumulation.
Aim of this thesis is the analysis of defects in gas-insulated systems with and without dielectric interfaces under DC voltage stress and thereby to contribute to a reliable interpretation of partial discharge measurements. In addition, known electrical and novel optical measurement methods are investigated with respect to their capabilities and limitations when used under DC voltage stress. The experimental investigations are carried out in model electrode arrangements. The weakly inhomogeneous electrical field of the gas-insulated systems is replicated in three configurations, one for each defect investigated. The detailed analysis of the discharge processes is enabled by a direct measurement of the partial discharge currents. A distinction between impulse currents and pulseless currents is made.
Due to assembly faults or insufficient material quality fixed, metallic protrusions can be created within the insulation system. The experimentally observed dependencies of the discharge processes on the polarity of the defect, the insulating gas pressure and the voltage stress permit a classification of four different types of discharge. In addition to the investigations in the most commonly used insulating gas sulphur-hexafluoride a comparison of the results with measurements in the climate-friendly alternative synthetic air are made. Derived from this, commonalities and differences in the discharge behaviour are discussed.
Free moving, metallic particles can adhere to the gas-solid interface. The accumulation of surface charges at the solid insulator influences the partial discharge inception significantly. Due to the steady-state discharge behaviour, which is comparable to the fixed, metallic protrusion without contact to a dielectric interface, distinguishing between the two defects based on pulse repetition rates and amplitudes is challenging.
A unique aspect under DC voltage stress are discharges at the orthogonal interface between electrode coating and insulating gas. The analysis of the causes of the occurrence of these discharges, their optical and electrical characteristics and strategies for the prevention are investigated.
Derived from the results, recommendations for partial discharge diagnosis of gas-insulated DC systems are discussed. These recommendations are an essential component for the future use of this asset in a high-performance electric power system with high reliability of the power supply.
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