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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

?Algoritmos e Arquiteturas VLSI para Detectores MIMO com Decis?o Suave

Duarte, Jos? Marcelo Lima 17 August 2012 (has links)
Made available in DSpace on 2015-03-03T15:08:47Z (GMT). No. of bitstreams: 1 JoseMLD_TESE.pdf: 1767414 bytes, checksum: b0bb7821ad5c80023e5752938c7e5922 (MD5) Previous issue date: 2012-08-17 / The use of Multiple Input Multiple Output (MIMO) systems has permitted the recent evolution of wireless communication standards. The Spatial Multiplexing MIMO technique, in particular, provides a linear gain at the transmission capacity with the minimum between the numbers of transmit and receive antennas. To obtain a near capacity performance in SM-MIMO systems a soft decision Maximum A Posteriori Probability MIMO detector is necessary. However, such detector is too complex for practical solutions. Hence, the goal of a MIMO detector algorithm aimed for implementation is to get a good approximation of the ideal detector while keeping an acceptable complexity. Moreover, the algorithm needs to be mapped to a VLSI architecture with small area and high data rate. Since Spatial Multiplexing is a recent technique, it is argued that there is still much room for development of related algorithms and architectures. Therefore, this thesis focused on the study of sub optimum algorithms and VLSI architectures for broadband MIMO detector with soft decision. As a result, novel algorithms have been developed starting from proposals of optimizations for already established algorithms. Based on these results, new MIMO detector architectures with configurable modulation and competitive area, performance and data rate parameters are here proposed. The developed algorithms have been extensively simulated and the architectures were synthesized so that the results can serve as a reference for other works in the area / O uso de sistemas de M?ltiplas Entradas e M?ltiplas Sa?das (Multiple Input Multiple Output - MIMO) tem permitido a recente evolu??o dos novos padr?es de comunica??o m?vel. A t?cnica MIMO da Multiplexa??o Espacial, em particular, prov? um aumento linear na capacidade de transmiss?o com o m?nimo entre n?mero de antenas transmissoras e antenas receptoras. Para se obter um desempenho pr?ximo a capacidade em sistemas com Multiplexa??o Espacial faz-se necess?rio o uso de um detector MIMO com decis?o suave do tipo Maximum A Posteriori Probability. Entretanto, tal detector e muito complexo para solu??es pr?ticas. Assim, o objetivo dos algoritmos de detec??o MIMO voltados para implementa??o e obter uma boa aproxima??o do detector ideal mantendo um n?vel de complexidade aceit?vel. Al?m disso, o algoritmo precisa ser mapeado para uma arquitetura VLSI de ?rea pequena e que atenda a taxa de transmiss?o exigida pelos padr?es de comunica??es m?veis. Sendo a multiplexa??o espacial uma t?cnica recente, defende-se que ainda h? muito espa?o para evolu??o dos algoritmos e arquiteturas relacionadas. Por isso, esta tese se focou no estudo de algoritmos sub-?timos e arquiteturas VLSI para detectores MIMO de banda larga com decis?o suave. Como resultado, algoritmos in?ditos foram desenvolvidos partindo de propostas de otimiza??es para algoritmos j? estabelecidos. Baseado nesses resultados, novas arquiteturas de detectores MIMO com modula??o configur?vel e competitivos par?metros de ?rea, desempenho e taxa de processamento s?o aqui propostas. Os algoritmos desenvolvidos foram extensivamente simulados e as arquiteturas sintetizadas para que os resultados pudessem servir como refer?ncia para outros trabalhos na ?rea.

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