This thesis describes a digital control system used by the Network Analog Group of the Bonneville Power Administration. This system, the Random Sequence Closing Control System, provides automatic control for a special purpose analog computer used in the study of switching surge over voltages on power transmission lines. This system, which uses pseudorandom data, has made it feasible to analyze switching surge phenomena on a statistical basis.

In this thesis analysis and design of a wide input range DC-DC converter is proposed along with a robust power control scheme. The proposed converter and its control is designed to be compatible to a fuel cell power source, which exhibits 2:1 voltage variation as well as a slow transient response. The proposed approach consists of two stages: a primary three-level boost converter stage cascaded with a high frequency, isolated boost converter topology, which provides a higher voltage gain and isolation from the input source. The function of the first boost converter stage is to maintain a constant voltage at the input of the cascaded DC-DC converter to ensure optimal performance characteristics with high efficiency. At the output of the first boost converter a battery or ultracapacitor energy storage is connected to take care of the fuel cell slow transient response (200 watts/min). The robust features of the proposed control system ensure a constant output DC voltage for a variety of load fluctuations, thus limiting the power being delivered by the fuel cell during a load transient. Moreover, the proposed configuration simplifies the power control management and can interact with the fuel cell controller. The simulation results and the experimental results confirm the feasibility of the proposed system.

The exceptional feature of the brushless doubly-fed machine is the lack of need for frequent replacement of brushes. The inherent instability of this machine has to be overcome for its application in adjustable speed drives and variable speed generation systems. Specific objectives were: to study the characteristics of the machine pertinent to its application in adjustable speed drives and variable speed generation systems, to develop a stabilizer depending on the nature of the instability. The brushless doubly-fed machine was found to be unstable over much of the useful operating range. A digital feedback control was implemented using a combination of hardware and software elements/to stabilize the machine. The feedback system was a band pass filter. The software was developed with a processing time fast enough to match the speed of response required by the stabilizer to overcome the unstable oscillations. The performance of the machine was compared with and without the stabilizer to test its effectiveness. Stable operation was achieved over the entire operating region. / Graduation date: 1991

To support the increasingly demanding requirements for power conversion units, a digitally controlled dual output stage buck converter is designed. The system consists of a dual output stage, which includes an auxiliary buck output stage connected in parallel with a main output stage. The auxiliary output stage is only active during load transient to suppress the output voltage variation. A digital controller is designed to control both stages with a linear/nonlinear control scheme. Nonlinear control is applied during load transient based on the capacitor charge balance principle; whereas linear PID control governs the steady state operation. The design is verified with simulation and experimentally with discrete components. The controller is realized with a FPGA with preset output stage parameters. The experimental result shows a 60% reduction of output voltage variation for a heavy-to-light load transient.

A digital adaptive slope control (DASC) technique is presented to improve the dynamic response and efficiency of a current programmed mode (CPM) buck converter employing a low-cost auxiliary phase. Compared to the existing nonlinear control techniques, the advantages of the proposed control scheme include superior voltage droop and settling time, and on-line calibration to compensate for tolerance in the inductance. The proposed technique is experimentally verified on a 500 kHz, 10 V to 2.5 V CPM buck converter prototype. Charge balancing and optimal transient response are achieved for a range of positive and negative load steps. In addition, compared to a representative single phase converter, the proposed system not only has better dynamic response but also achieves 2 % heavy-load and 10 % light-load steady-state efficiency improvement. The impact of the auxiliary phase operation on the converter’s dynamic efficiency is also evaluated at different load step amplitudes and frequencies.

To support the increasingly demanding requirements for power conversion units, a digitally controlled dual output stage buck converter is designed. The system consists of a dual output stage, which includes an auxiliary buck output stage connected in parallel with a main output stage. The auxiliary output stage is only active during load transient to suppress the output voltage variation. A digital controller is designed to control both stages with a linear/nonlinear control scheme. Nonlinear control is applied during load transient based on the capacitor charge balance principle; whereas linear PID control governs the steady state operation. The design is verified with simulation and experimentally with discrete components. The controller is realized with a FPGA with preset output stage parameters. The experimental result shows a 60% reduction of output voltage variation for a heavy-to-light load transient.

A digital adaptive slope control (DASC) technique is presented to improve the dynamic response and efficiency of a current programmed mode (CPM) buck converter employing a low-cost auxiliary phase. Compared to the existing nonlinear control techniques, the advantages of the proposed control scheme include superior voltage droop and settling time, and on-line calibration to compensate for tolerance in the inductance. The proposed technique is experimentally verified on a 500 kHz, 10 V to 2.5 V CPM buck converter prototype. Charge balancing and optimal transient response are achieved for a range of positive and negative load steps. In addition, compared to a representative single phase converter, the proposed system not only has better dynamic response but also achieves 2 % heavy-load and 10 % light-load steady-state efficiency improvement. The impact of the auxiliary phase operation on the converter’s dynamic efficiency is also evaluated at different load step amplitudes and frequencies.

In this thesis analysis and design of a wide input range DC-DC converter is proposed along with a robust power control scheme. The proposed converter and its control is designed to be compatible to a fuel cell power source, which exhibits 2:1 voltage variation as well as a slow transient response. The proposed approach consists of two stages: a primary three-level boost converter stage cascaded with a high frequency, isolated boost converter topology, which provides a higher voltage gain and isolation from the input source. The function of the first boost converter stage is to maintain a constant voltage at the input of the cascaded DC-DC converter to ensure optimal performance characteristics with high efficiency. At the output of the first boost converter a battery or ultracapacitor energy storage is connected to take care of the fuel cell slow transient response (200 watts/min). The robust features of the proposed control system ensure a constant output DC voltage for a variety of load fluctuations, thus limiting the power being delivered by the fuel cell during a load transient. Moreover, the proposed configuration simplifies the power control management and can interact with the fuel cell controller. The simulation results and the experimental results confirm the feasibility of the proposed system.

Thesis (M. Phil.)--University of Hong Kong, 1982.

As the speed and power demands on Buck converters continue to increase, it has become time to replace the linearly-controlled conventional Buck converter. Digital circuits, such as microprocessors, are requiring higher dynamic currents, at lower voltages, than ever before. Traditionally, such Buck converters have been controlled by linear voltage-mode or current-mode control methods. While these controllers offer such advantages as fixed switching frequencies and zero steady-state error, their reaction speed is inherently limited by their bandwidth which is a fraction of the converter switching frequency. Therefore, to improve the transient response of a Buck converter in a practical manner, four novel ideas are presented in this thesis. The first contribution is an analog “charge balance controller”. The control method utilizes the concept of capacitor charge balance to achieve a near-optimal transient response for Buck converters undergoing a rapid load change. Unlike previous work, the proposed controller does not require expensive and/or slow analog multipliers/dividers. In addition, the nominal inductance value is not required by the proposed controller. Simulation and experimental results demonstrate a significant improvement in transient performance over that of a linear voltage-mode controller. For low duty cycle applications, the unloading transient performance of a Buck converter tends to be poor when compared to the corresponding loading transient performance. Therefore, the second contribution is an auxiliary circuit and an analog auxiliary controller which drastically improves the performance of a Buck converter undergoing an unloading transient. Significant overshoot reduction was observed over that of a linearly-controlled conventional Buck converter. The third contribution is a digital implementation of the aforementioned “charge balance control” concept. Through digital implementation the control law is extended to include load-line regulation. Unlike previous work, large lookup tables are not required to perform complex mathematical functions, thus the number of required gates is significantly reduced. The final contribution is a digital implementation of the “charge balance controller” capable of operating with the previously-mentioned auxiliary circuit. This complete solution is capable of improving the voltage deviation caused by loading and unloading transients. In addition, the combined auxiliary circuit and control law is extended to load-line regulation applications. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2010-01-31 23:01:24.606