O objetivo deste trabalho é a investigação de um algoritmo adaptativo para compensação dos erros no cálculo dos fasores do sistema de potência quando há variações significativas na freqüência dos sinais de tensão e corrente. O principal benefício desta técnica é permitir a compensação dos erros utilizando freqüência de amostragem e janela de dados constantes, possibilitando a construção de relés microprocessados para proteção de geradores com hardware mais simples. O algoritmo adaptativo denominado AIVF (Algoritmo Inume a Variações de Freqüência) foi testado a partir de uma série de sinais com características como variação da freqüência da fundamental, componente exponencial amortecida e harmônicos, sendo os resultados apresentados no capítulo 4.4. Além do AIVF, nos capítulos iniciais são apresentados aspectos inerentes à proteção de geradores como aterramento e uma descrição das principais proteções aplicáveis a geradores de até 50MVA. / The main pourpose of that work is inquire an adaptive algorithm to compensate the errors in the power system phasors calculation when occur significant changes in the frequency of the current and voltage signals. The main benefit of that technique is to permit errors compensation with constant sampling frequency and constant data window, making possible construction of microcomputer relays for generator protection with simple hardware. The adaptive algorithm named ANAFC (Algorithm Not Affected by Frequency Changes) was tested by some signals with characteristics like changes in the fundamental frequency, dc decaying and harmonics. The results are presented in the section 4.4. Beyond ANAFC, in the initial sections are presented aspects regarding generator protection like earthing and a description of the main protection functions applied in generators till 50MVA.

O objetivo deste trabalho é a investigação de um algoritmo adaptativo para compensação dos erros no cálculo dos fasores do sistema de potência quando há variações significativas na freqüência dos sinais de tensão e corrente. O principal benefício desta técnica é permitir a compensação dos erros utilizando freqüência de amostragem e janela de dados constantes, possibilitando a construção de relés microprocessados para proteção de geradores com hardware mais simples. O algoritmo adaptativo denominado AIVF (Algoritmo Inume a Variações de Freqüência) foi testado a partir de uma série de sinais com características como variação da freqüência da fundamental, componente exponencial amortecida e harmônicos, sendo os resultados apresentados no capítulo 4.4. Além do AIVF, nos capítulos iniciais são apresentados aspectos inerentes à proteção de geradores como aterramento e uma descrição das principais proteções aplicáveis a geradores de até 50MVA. / The main pourpose of that work is inquire an adaptive algorithm to compensate the errors in the power system phasors calculation when occur significant changes in the frequency of the current and voltage signals. The main benefit of that technique is to permit errors compensation with constant sampling frequency and constant data window, making possible construction of microcomputer relays for generator protection with simple hardware. The adaptive algorithm named ANAFC (Algorithm Not Affected by Frequency Changes) was tested by some signals with characteristics like changes in the fundamental frequency, dc decaying and harmonics. The results are presented in the section 4.4. Beyond ANAFC, in the initial sections are presented aspects regarding generator protection like earthing and a description of the main protection functions applied in generators till 50MVA.

Detta är en rapport för ett 15hp examensarbete på Linköpings Tekniska Högskola. Projektet syftar till att implementera ett digitalt frekvensutjämningsfilter för audioapplikationer i ett Atmel DE2 FPGA utvecklingskort. Specifikt ska systemet användas till att korrigera ojämnheter i in-ear hörlurars frekvenssvar. Denna rapport är en beskrivning av systemets utformning och hur arbetet gick till väga. Resultatet blev ett väl fungerande system och ett antal förslag på förbättringar. / This is a report for a 15hp thesis at the Institute of Technology at Linköping University. The project aims to implement a digital frequency-equalizing filter for audio applications in an Atmel DE2 FPGA development board. More specifically the system will be used to correct unevennesses in the frequency response of in-ear earphones. This report is a description of the design of the system and how the work on the project was executed. The result was a well functioning system with suggestions on possible improvements.

As semiconductor technology continues to scale, energy-efficiency and power consumption have become the dominant design limitations, especially, for embedded and portable systems. Conventional worst-case design is highly inefficient from an energy perspective. In this dissertation, we propose techniques for adaptivity at the architecture and circuit levels in order to remove some of these inefficiencies. Specifically, this dissertation focuses on research contributions in two areas: 1) the development of SRAM models and circuitry to enable an intra-array voltage island approach for dealing with large random process variation; and 2) the development of low-energy digital signal processing (DSP) techniques based on controlled timing error acceptance. In the presence of increased process variation, which characterizes nanometer scale CMOS technology, traditional design strategies result in designs that are overly conservative in terms of area, power consumption, and design effort. Memory arrays, such as SRAM-based cache, are especially vulnerable to process variation, where the penalty is a power and bit-cell increase needed to satisfy a variety of noise margins. To improve yield and reduce power consumption in large SRAM arrays, we propose an intra-array voltage island technique and develop circuits that allow for a cost-effective deployment of this technique to reduce the impact of process variation. The voltage tuning architecture makes it possible to obtain, on average, power consumption reduction of 24% iso-area in the active mode, and the leakage power reduction up to 52%, and, on average, of 44% iso-area in the sleep mode. Alternatively, bitcell area can be reduced up to 50% iso-power compared to the existing design strategy. In many portable and embedded systems, signal processing (SP) applications are dominant energy consumers. In this dissertation we investigate the potential of error-permissive design strategies to reduce energy consumption in such SP applications. Conventional design strategies are aimed at guaranteeing timing correctness for the input data that triggers the worst-case delay, even if such data occurs infrequently. We notice that an intrinsic notion of quality floor characterizes SP applications. This provides the opportunity to significantly reduce energy consumption in exchange for a limited signal quality reduction by strategically accepting small and infrequent timing errors. We propose both design-time and run-time techniques to carefully control the quality-energy tradeoff under scaled VDD. The basic philosophy is to prevent signal quality from severe degradation, on average, by using data statistics. We introduce techniques for: 1) static and dynamic adjustment of datapath bitwidths, 2) design-time and run-time reordering of computations, 3) protection of important algorithm steps, and 4) exploiting the specific patterns of errors for low-cost post-processing to minimize signal quality degradation. We demonstrate the effectiveness of the proposed techniques on a 2D-IDCT/DCT design, as well as several digital filters for audio and image processing applications. The designs were synthesized using a 45nm standard cell library with energy and delay evaluated using NanoSim and VCS. Experiments show that the introduced techniques enable 40~70% energy savings while only adding less than 6% area overhead when applied to image processing and filtering applications. / text

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Motion and tilt have long hindered the accuracy, reliability, and response of magnetic detection systems. Perturbations in the magnetic field reading resulting from motion cause degradation of the output signal, compromising the performance and reliability of the magnetometer system. The purpose of this document is to describe the development, construction, and testing of a tilt-stabilized three-axis magnetic field sensor. The sensor is implemented as a three-axis general-purpose magnetic field sensor, with the additional capability of being implemented as a compass. Design and construction of system hardware is discussed, along with software development and implementation. Finite impulse response filters are designed and implemented in hardware to filter the acquired magnetic signals. Various designs of median filters are simulated and tested for smoothing inclination signal irregularities and noise. Trigonometric conversions necessary for tilt-compensation are calculated in software using traditional methods, as well as the Coordinate Rotation Digital Computer (CORDIC) algorithm. Both calculation methods are compared for execution time and efficiency. Successful incorporation of all design aspects leads to detection and output of stable earth magnetic fields, sinusoidal signals, and aperiodic signatures while the magnetometer system is subject to significant tilt motion. Optimized system execution time leads to a maximum detectable signal bandwidth of 410 Hz. Integration of azimuth angle calculation is incorporated and is successfully tested with minimal error, allowing the system to be used as a compass. Results of the compensated system tests are compared to non-compensated results to display system performance, including tilt-compensation effectiveness, noise attenuation, and operational speed. / Master of Science

Harmonics are created by non-linear devices connected to the power system. Power system harmonics are multiples of the fundamental power system frequency and these harmonic frequencies can create distorted voltages and currents. Distortion of voltages and currents can affect the power system adversely causing power quality problems. Therefore, estimation of harmonics is of high importance for efficiency of the power system network. The problem of harmonic loss evaluation is of growing importance for renewable power system industry by impacting the operating costs and the useful life of the system components. Non-linear devices such as power electronics converters can inject harmonics alternating currents (AC) in the electrical power system. The number of sensitive loads that require ideal sinusoidal supply voltage for their proper operation has been increasing. To maintain the quality limits proposed by standards to protect the sensitive loads, it is necessary to include some form of filtering device to the power system. Harmonics also increases overall reactive power demanded by equivalent load. Filters have been devised to achieve an optimal control strategy for harmonic alleviation problems. To achieve an acceptable distortion, increase the power quality and to reduce the harmonics hence several three phase filter banks are used and connected in parallel. In this thesis, high order harmonics cases have been suppressed by employing variants of Butterworth, Chebyshev and Cauer filters. MATLAB/SIMULINK wind farm model was used to generate and analyze the different harmonics magnitude and frequency. High voltage direct current (HVDC) lines for an electrical grid that is more than50km far away wind farm generation plant was investigated for harmonics. These HVDC lines are also used in offshore wind farm plant. Investigated three-phase harmonics filters are shunt elements that are used in power systems for decreasing voltage distortion and for correcting the power factor. Renewable energy sources are not the stable source of energy generation like wind, solar and tidal e.t.c. Though they are secondary sources of generation and hard to connect with electrical grid. In near future the technique is to use the wave digital filter (WDF) or circulator-tree wave digital filter (CTWDF) for the renewable energy application can be employed to mitigate the harmonics. These WDF and CTWDF can b eused in HVDC lines and smart grid applications. A preliminary analysis is conducted for such a study.