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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
131

Design of Low-Capacitance Electrostatic Discharge (ESD) Protection Devices in Advanced Silicon Technologies.

Dong, Aihua 01 January 2018 (has links)
Electrostatic discharge (ESD) related failure is a major IC reliability concern and this is particularly true as technology continues shrink to nano-metric dimensions. ESD design window research shows that ESD robustness of victim devices keep decreasing from 350nm bulk technology to 7nm FinFET technologies. In the meantime, parasitic capacitance of ESD diode with same It2 in FinFET technologies is approximately 3X compared with that in planar technologies. Thus transition from planar to FinFET technology requires more robust ESD protection however the large parasitic capacitance of ESD protection cell is problematic in high-speed interface design. To reduce the parasitic capacitance, a dual diode silicon controlled rectifier (DD-SCR) is presented in this dissertation. This design can exhibit good trade-offs between ESD robustness and parasitic capacitance characteristics. Besides, different bounding materials lead to performance variations in DD-SCRs are compared. Radio frequency (RF) technology is also demanded low capacitance ESD protection. To address this concern, a ?-network is presented, providing robust ESD protection for 10-60 GHz RF circuit. Like a low pass ? filter, the network can reflect high frequency RF signals and transmit low frequency ESD pulses. Given proper inductor value, networks can work as robust ESD solutions at a certain Giga Hertz frequency range, making this design suitable for broad band protection in RF input/outputs (I/Os). To increase the holding voltage and reduce snapback, a resistor assist triggering heterogeneous stacking structure is presented in this dissertation, which can increase the holding voltage and also keep the trigger voltage nearly as same as a single SCR device.
132

Design of an Automotive IoT Device to Improve Driver Fault Detection Through Road Class Estimation

Murray, Matt 01 June 2022 (has links) (PDF)
Unsafe driver habits pose a serious threat to all vehicles on the road. This thesis outlines the development of an automotive IoT device capable of monitoring and reporting adverse driver habits to mitigate the occurrence of unsafe practices. The driver habits targeted are harsh braking, harsh acceleration, harsh cornering, speeding and over revving the vehicle. With the intention of evaluating and expanding upon the industry method of fault detection, a working prototype is designed to handle initialization, data collection, vehicle state tracking, fault detection and communication. A method of decoding the broadcasted messages on the vehicle bus is presented and unsafe driver habits are detected using static limits. An analysis of the initial design’s performance revealed that the industry method of detecting faults fails to account for the vehicle’s speed and is unable to detect faults on all roadways. A framework for analyzing fault profiles at varying speeds is presented and yields the relationship between fault magnitude and speed. A method of detecting the type of road driven was developed to dynamically assign fault limits while the vehicle traveled on a highway, city street or in traffic. The improved design correctly detected faults along all types of roads and proved to greatly expand upon the current method of fault detection used by the automotive IoT industry today.
133

The Development of a High-Performance Distributed Battery Management System for Large Lithium Ion Packs

Grasberger, Christopher B 01 June 2015 (has links) (PDF)
A high performance battery management system (BMS) for large capacity cells was designed, built, and tested in a cycle of three revisions. The BMS was designed for use in applications where the battery pack configuration is unknown: parallel, series, or any combination. Each of the cells is equipped with its own battery management system to allow a peer-to-peer mesh network to monitor the safety of the cell. The BMS attached to each cell also is equipped with a 25A DC/DC converter to perform active balancing between cells in a string. This converter can transfer charge to (or from) a cell of higher potential and a cell of lower potential at the same time. The balancing circuit has a peak efficiency of 85.3%. The system draws only 53mA while balancing at 25A helping to increase low current performance. The system draws just under 5mA over all while active. Each BMS is equipped with one current sensor, which can measure ±800A with a second ±120A current range. Additionally, the board is equipped with coulomb counting to provide a better understanding of each cell. While this design has many great features, lack of full software support makes many of the subsystems dependent on user interaction to use. As a result, the design is not fully complete. Additionally, last minute design changes on the final revision resulted in detrimental effects to the accuracy of many of the analog circuits including the current sensing features.
134

Design and Modeling of a Distributed Network for the DC House Project

Rotsios, Lauren N 01 June 2021 (has links) (PDF)
This thesis covers the design and simulation of a model for a distributed network of DC Houses in MATLAB Simulink. The model will allow for sharing of power between houses within the network. The developed model consists of five separate DC House branches with local power generation. Each branch consists of a PV MPPT charge controller subsystem, a resistive load, and a bidirectional buck-boost converter subsystem. The high voltage side of every bidirectional buck-boost converter is connected together through the transmission line at a single high voltage DC bus. The performance of the individual components of the model is verified before constructing the network. The power sharing capability of the network was evaluated by measuring the efficiency transmission at varying wire gauges, distances, and high-end voltages. Results of the study show that for the most part, higher transmission voltage resulted in higher efficiency. However, this was not the case at some configurations due to different methods of power sharing. Overall, the proposed design provides a viable model for a distributed network of DC Houses, which serves as a basis model for future designs of DC House network for different parameters such as capacity, size and price points.
135

Design and Implementation of Color-Shift Keying for Visible Light Communications

Monteiro, Eric 10 1900 (has links)
<p>Color-shift keying (CSK) is a visible light communication (VLC) intensity modulation scheme, outlined in IEEE 802.15.7, that transmits data imperceptibly through the variation of the light color emitted by a red, green, and blue (RGB) light emitting diode (LED). Unlike other intensity modulation schemes, CSK guarantees that the intensity of the luminary will not fluctuate, thus limiting potential human health complications related to flickering light.</p> <p>In this work, a rigorous design framework for CSK constellations is presented. The benefits of the frame work are that it can optimize constellations while accounting for cross talk between the color communication channels formed by the colored LEDs. Unlike previous works, the method applies the study of colorimetry to optimize higher order CSK constellations such that the luminary functions with a desired operating color, allowing constellations to be designed to meet lighting industry quality metrics.</p> <p>This work concludes with the implementation of a CSK communication channel for the purposes of measuring the symbol error rate (SER) versus signal to noise ratio (SNR) of CSK constellations. It is demonstrated that the optimized constellations can achieve equal performance to the standardized constellations, outlined in Section 12 of IEEE 802.15.7, while only requiring half the transmitted power.</p> / Master of Applied Science (MASc)
136

Microprocessor Application in Walsh-Fourier Conversion

Bansod, Pradeep N. 11 1900 (has links)
<p>A microprocessor based system to convert the Walsh spectrum of a frequency limited signal to its Fourier spectrum has been designed and built. The entire processing hardware is implemented on a single PLS-401 card, which consists of an Intel 4004 microprocessor, read only memories to store the conversion program and matrices of constants, random access memories to store results, and input/output ports. The converter can process up to 32 coefficients, and utilizes an 8-bit word length. For test purposes, the Walsh spectra are programmed into a read only memory, and the Fourier spectra are displayed in binary form on an LED matrix. The maximum conversion time is 1.81 seconds, and the maximum absolute error is 2.03% of the largest possible coefficient.</p> / Master of Science (MS)
137

Electric Load Forecasting Using Long Short-term Memory Algorithm

Yang, Tianshu 01 January 2019 (has links)
Abstract Power system load forecasting refers to the study or uses a mathematical method to process past and future loads systematically, taking into account important system operating characteristics, capacity expansion decisions, natural conditions, and social impacts, to meet specific accuracy requirements. Dependence of this, determine the load value at a specific moment in the future. Improving the level of load forecasting technology is conducive to the planned power management, which is conducive to rationally arranging the grid operation mode and unit maintenance plan, and is conducive to formulating reasonable power supply construction plans and facilitating power improvement, and improve the economic and social benefits of the system. At present, there are many methods for load forecasting. The newer algorithms mainly include the neural network method, time series method, regression analysis method, support vector machine method, and fuzzy prediction method. However, most of them do not apply to long-term time-series predictions, and as a result, the prediction accuracy for long-term power grids does not perform well. This thesis describes the design of an algorithm that is used to predict the load in a long time-series. Predict the load is significant and necessary for a dynamic electrical network. Improved the forecasting algorithm can save a ton of the cost of the load. In this paper, we propose a load forecasting model using long short-term memory(LSTM). The proposed implementation of LSTM match with the time-series dataset very well, which can improve the accuracy of convergence of the training process. We experiment with the difference time-step to expedites the convergence of the training process. It is found that all cases achieve significant different forecasting accuracy while forecasting the difference timesteps. Keywords—Load forecasting, long short-term memory, micro-grid
138

Secure routing and trust computation in multihop infrastructureless networks

Ghosh, Tirthankar 02 June 2005 (has links)
Today's wireless networks rely mostly on infrastructural support for their operation. With the concept of ubiquitous computing growing more popular, research on infrastructureless networks have been rapidly growing. However, such types of networks face serious security challenges when deployed. This dissertation focuses on designing a secure routing solution and trust modeling for these infrastructureless networks. The dissertation presents a trusted routing protocol that is capable of finding a secure end-to-end route in the presence of malicious nodes acting either independently or in collusion, The solution protects the network from active internal attacks, known to be the most severe types of attacks in an ad hoc application. Route discovery is based on trust levels of the nodes, which need to be dynamically computed to reflect the malicious behavior in the network. As such, we have developed a trust computational model in conjunction with the secure routing protocol that analyzes the different malicious behavior and quantifies them in the model itself. Our work is the first step towards protecting an ad hoc network from colluding internal attack. To demonstrate the feasibility of the approach, extensive simulation has been carried out to evaluate the protocol efficiency and scalability with both network size and mobility. This research has laid the foundation for developing a variety of techniques that will permit people to justifiably trust the use of ad hoc networks to perform critical functions, as well as to process sensitive information without depending on any infrastructural support and hence will enhance the use of ad hoc applications in both military and civilian domains.
139

Artificial intelligence methodologies in energy management system

Kulkarni, Ananth D 04 1900 (has links)
Energy management system
140

Reroute sequence planning in multiprotocol label switching networks

Özbilgin, İzzet Gökhan. Supervisor : Bazlamaçcı, Cüneyt F. January 2004 (has links) (PDF)
Thesis (M.S.) -- Middle East Technical University, 2004. / Keywords: Traffic Engineering, Rerouting, Sequence Planning, MPLS, Label Switched Paths.

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