New technologies present opportunities and challenges for industries. One major challenge is the ease, or even feasibility, of its adoption. The Time-Sensitive Networking (TSN) standards offer a range of features relevant to various applications and are key for the transition to Industry 4.0. These features include deterministic zero-jitter, low-latency data transmission, transmission of traffic with various levels of time-criticality on the same network, fault tolerance mechanisms, and advanced network management allowing dynamic reconfiguration. This thesis aims to develop tools that enable the industry to adopt TSN easily and efficiently. Specifically, we create tools that facilitate the migration of legacy networks to TSN, enabling the preservation of most of the legacy systems and solutions while reducing costs and adoption time. Firstly, we introduce LETRA (Legacy Ethernet-based Traffic Mapping Tool), a tool for mapping Ethernet-based legacy traffic to the new TSN traffic classes. Secondly, we develop HERMES (Heuristic Multi-queue Scheduler), a heuristic Time-Triggered (TT) traffic scheduler that can meet the characteristics of legacy systems and provide quick results suitable for reconfiguration. Thirdly, we develop TALESS (TSN with Legacy End-Stations Synchronization), a mechanism to avoid adverse consequences caused by the lack of synchronization between legacy systems and TSN-based ones, as not all legacy systems need to support the TSN synchronization mechanisms. Finally, we improve Stream Reservation Protocol (SRP) to enhance Audio-Video Bridging (AVB) traffic configuration in terms of termination and consistency. / Uppfinningen av ångmaskinen i slutet av 1700-talet markerade början på en kontinuerlig och snabb process av automatisering och förbättring inom industrin, som tog ytterligare fart i och med införandet av datorstyrda maskiner och robotik i mitten av 1900-talet. Moderna fabriker och deras produkter är beroende av hundratals specialiserade processorer, inklusive sensorer, ställdon och styrenheter, som samarbetar för att utföra uppgifter och tillhandahålla tjänster. Dessa processorer är beroende av kommunikations-subsystem för att samordna och dela resurser. Dessa system, som vanligtvis kallas distribuerade system, omger oss och används av de flesta människor hela tiden. Exempel på distribuerade system finns i en mängd olika exempel, från moderna bilar till fabriker som producerar olika varor. I en bil finns det till exempel många olika sensorer och ställdon som hastighetsmätare, positionssensorer, bränsleinsprutare och tändspolar, som alla arbetar tillsammans för att se till att bilen fungerar säkert och effektivt, medan det i fabriker används robotarmar, transportband och andra anordningar för att automatisera produktionsprocessen och öka effektiviteten. Den snabba utvecklingen av tekniken kan dock göra det svårt för företag att hålla jämna steg med de senaste verktygen och systemen, eftersom kostnaden för att införa tekniken kanske inte är kostnadseffektiv, inte bara på grund av att tekniken måste förvärvas, utan också på grund av de förändringar som införandet kräver i andra system som samarbetar. Till exempel skulle införandet av ett nytt kommunikations-subsystem kräva att alla enheter som använder det anpassas. Dessutom kräver uppgraderingen till nyare teknik ofta betydande resurser, inte bara ekonomiska utan även naturresurser. Detta kan leda till ökat avfall och ökade koldioxidutsläpp, vilket utgör en risk för miljön. Dessutom kan följderna av teknikuppgraderingar, till exempel bortskaffande av föråldrad utrustning och produktion av e-avfall, ha ytterligare miljöpåverkan. I den här avhandlingen fokuserar vi på Time Sensitive Networking (TSN), en ny kommunikationsstandard med betydande fördelar för den framväxande tekniken. Även om TSN-tekniken ger många fördelar, bland annat högre kommunikationshastighet och lägre latenstider, saknar många nuvarande industrisystem mjuk- och hårdvarukraven för att stödja denna teknik. Målet med vår forskning är därför tvåfaldigt: för det första att förbättra TSN’s mekanismer för att göra den mer attraktiv för industrin och för det andra att utveckla verktyg som möjliggör en sömlös migration och integration av äldre system till TSN, så att slutstationerna kan utnyttja fördelarna med TSN utan att behöva byta ut eller uppgradera större delen av systemet. Detta tillvägagångssätt sparar värdefull tid och resurser och minskar det avfall som uppstår under processen.

Since its inception in the nineteenth century, the Internal Combustion Engine (ICE) remains the most prevalent technology in transportation systems to date. In order to minimize emissions, it is important that ICE is operated according to its optimized design conditions. As such, condition monitoring and Fault Detection and Diagnosis (FDD) tools can play an important role in detecting conditions that would affect the operability of the engine. In this research, different signal-based Fault Detection and Diagnosis (FDD) techniques are researched and implemented for fault condition monitoring of ICE. The implementation of prognostics for the engine in an automated form has important consequences that include cost savings, increased reliability, reduction of GHG emissions, better safety, and extended life for the vehicle. In this research, in order to carry out FDD onboard, a low-cost and flexible internet-based data-acquisition system (DAQ) was designed and implemented. The main part of the system is an embedded hardware running a full desktop version of Linux. This sensory system leverages the positive aspects of both real-time and general-purpose architectures to ensure engine monitoring at high sampling rates. Unlike other commercial DAQ systems, the software of this device is open-source, free of charge, and highly expandable to suit other FDD applications. In addition to data collection at high sampling rates, the FDD system includes advanced FDD strategies. The Fault Detection and Diagnosis strategies considered use a combination of Fourier Transforms (FT), Wavelet Transforms (WT), and Principal Component Analysis (PCA). Meanwhile, Fault Classification was carried using Neural Networks consisting of the Multi-Layer Perceptron (MLP). Three strategies were comparatively considered for the training of the Neural Network (NN), namely the Levenberg-Marquardt (LM), the Extended Kalman Filter (EKF), and the Smooth Variable Structure Filter (SVSF) techniques. The proposed FDD system was able to achieve 100% accuracy in classifying a set of engine faults. / Thesis / Master of Applied Science (MASc)

The huge advancement in the textiles industry and the accurate control on the mechanization process coupled with cost-effective manufacturing offer an innovative environment for new electronic systems, namely electronic textiles. The abundance of fabrics in our regular life offers immense possibilities for electronic integration both in wearable and large-scale applications. Augmenting this technology with a set of precepts and a simulation environment creates a new software/hardware architecture with widely useful implementations in wearable and large-area computational systems. The software environment acts as a functional modeling and testing platform, providing estimates of design metrics such as power consumption. The construction of an electronic textile (e-textile) hardware prototype, a large-scale acoustic beamformer, provides a basis for the simulator and offers experience in building these systems. The contributions of this research focus on defining the electronic textile architecture, creating a simulation environment, defining a networking scheme, and implementing hardware prototypes. / Ph. D.

This dissertation introduces Power Fingerprinting (PFP), a novel technique for assessing the execution integrity of embedded devices. A PFP monitor is an external device that captures the dynamic power consumption of a processor using fine-grained measurements at the clock-cycle level and applies anomaly detection techniques to determine whether the integrity of the system has been compromised. PFP uses a set of trusted signatures from the target code that are extracted during a pre-characterization process. PFP provides significant visibility into the internal execution status, making it extremely robust against evasion. Because of its independence and physical separation, PFP prevents attacks on the monitor itself and introduces minimal overhead on platforms with resource constraints. Due to its anomaly detection operation, PFP is effective against unknown (zero-day) attacks. This dissertation demonstrates the feasibility of PFP on different platforms with different configurations and architectural complexities. Experimental results demonstrate the feasibility of PFP in a basic deterministic embedded platform for radio applications in two different areas: security and regulatory certification. For more complex, non-deterministic platforms, this works presents feasibility results for monitoring the execution integrity of complex software on a high-performance Android platform, including the ability to detect a real privilege escalation attack. In addition, the dissertation develops several general techniques to implement and integrate PFP into embedded platforms such as a general monitoring architecture, a methodology to characterize software modules and extract signatures, and an approach to perform board characterization and improve monitoring sensitivity. / Ph. D.

In the context of a system design, resource-constraints refer to severe restrictions on allowable resources, while resource-efficiency is the capability to achieve a desired performance and, at the same time, to reduce wasting resources. To design for low-cost platforms, these fundamental concepts are useful under different scenarios and they call for different approaches, yet they are often mixed. Resource-constrained systems require aggressive optimizations, even at the expense of performance, to meet the stringent resource limitations. On the other hand, resource-efficient systems need a careful trade-off between resources and performance, to achieve the best possible combination. Designing systems for resource-constraints with the optimizations for resource-efficiency, or vice versa, can result in a suboptimal solution. Using modern cryptographic applications as the driving domain, I first distinguish resource-constraints from resource-efficiency. Then, I introduce the recurring strategies to handle these cases and apply them on modern cryptosystem designs. I illustrate that by clarifying the application context, and then by using appropriate strategies, it is possible to push the envelope on what is perceived as achievable, by up to two orders-of-magnitude. In the first part of this dissertation, I focus on resource-constrained modern cryptosystems. The driving application is Physical Unclonable Function (PUF) based symmetric-key authentication. I first propose the smallest block cipher in 128-bit security level. Then, I show how to systematically extend this design into the smallest application-specific instruction set processor for PUF-based authentication protocols. I conclude this part by proposing a compact method to combine multiple PUF components within a system into a single device identifier. In the second part of this dissertation, I focus on resource-efficient modern cryptosystems. The driving application is post-quantum public-key schemes. I first demonstrate energy-efficient computing techniques for post-quantum digital signatures. Then, I propose an area-efficient partitioning and a Hardware/Software codesign for its implementation. The results of these implemented modern cryptosystems validate the advantage of my approach by quantifying the drastic improvements over the previous best. / Ph. D.

The quick growth of embedded systems and their increasing computing power has made them suitable for a wider range of applications. Despite the increasing performance of modern embedded processors, they are outpaced by computational demands of the growing number of modern applications. This trend has led to emergence of hardware accelerators in embedded systems. While the processing power of dedicated hardware modules seems appealing, they require significant effort of development and integration to gain performance benefit. Thus, it is prudent to investigate and estimate the integration overhead and consequently the hardware acceleration benefit before committing to implementation. In this work, we present FPGA-Roofline, a visual model that offers insights to designers and developers to have realistic expectations of their system and that enables them to do their design and analysis in a faster and more efficient fashion. FPGA-Roofline allows simultaneous analysis of communication and computation resources in FPGA-based hardware accelerators. To demonstrate the effectiveness of our model, we have implemented hardware accelerators in FPGA and used our model to analyze and optimize the overall system performance. We show how the same methodology can be applied to the design process of any FPGA-based hardware accelerator to increase productivity and give insights to improve performance and resource utilization by finding the optimal operating point of the system. / Master of Science

Micro gas chromatography (μGC) system is a miniaturized and portable version of the conventional GC system, suitable for various applications such as healthcare and environmental analysis. The process of gas chromatography requires precise temperature control for the micro-fabricated preconcentrators and separation columns used since temperature changes directly affect retention time. Proportional Integral and Derivative (PID) controllers provide reliable temperature control and can be tuned to obtain the desired response. The conventional method of tuning the PID control parameters by trial and error is a tedious process and time-consuming process. This thesis aims to develop a PID auto-tuning and control system for auto-tuning microfabricated heaters in modular μGC systems. The developed system is based on the Ziegler Nichols rule-based PID tuning method for closed-loop systems, which uses the relay response of the micro-heater to calculate the PID tuning parameters. The system also includes an analysis system to verify the performance of the PID-tuned values and a tuning system where the PID values can be further tuned to obtain more precise control for the heaters. The aim of developing this system is to reduce the effective tuning time for heaters while satisfying the control requirements. In this thesis, we discuss the tuning methodology and the implementation of the PID tuning and control system, followed by a performance evaluation of the heaters tuned using the proposed system is discussed. / Master of Science / Gas chromatography (GC) is an established technique used for the qualitative and quantitative analysis of compounds present in a mixture. Micro-gas chromatography (μGC) systems are miniaturized versions of conventional GC systems. They are portable, energy-efficient, and facilitate on-site analysis in real-time, which is suitable for applications such as health care, forensics, and environmental analysis, requiring in-field analysis. GC is based on the principle that components of a gaseous mixture, when passed through a heated column coated with a stationary phase, separate out based on their extent of interaction with the stationary phase. The temperature control needs to be precise since it directly affects the process. PID control is the most common and reliable method for temperature control. It can be tuned to obtain the desired response, which can, however, be a tedious process. This thesis aims to develop a PID auto-tuning and control system for μ-fabricated heaters in μGC systems. As a part of this thesis, a system facilitating faster tuning of PID parameters for a given heater using the Ziegler Nichols closed-loop tuning method is developed. It uses the relay response of the micro-heater to determine the tuning value. The obtained PID values can be evaluated using the analysis system developed as a part of the system and can be further fine-tuned using the provided system to obtain the desired response. As a part of this thesis, we first discuss the development of the PID tuning and control system, after which the performance of the tuned values is evaluated for two micro-heaters.

Embedded systems for humanoid robots are required to be reliable, low in cost, scalable and robust. Most of the applications related to humanoid robots require efficient force control of Series Elastic Actuators (SEA). These control loops often introduce precise timing requirements due to the safety critical nature of the underlying hardware. Also the motor controller needs to run fast and interface with several sensors. The commercially available motor controllers generally do not satisfy all the requirements of speed, reliability, ease of use and small size. This work presents a custom motor controller, which can be used for real time force control of SEA on humanoid robots and exoskeletons. Emphasis has been laid on designing a system which is scalable, easy to use and robust. The hardware and software architecture for control has been presented along with the results obtained on a novel Series Elastic Actuator based humanoid robot THOR. / Master of Science / Humanoid robots can be used in several applications such as disaster management, replacing manual work in hazardous environments, helping human beings in navigation and day to day activities, etc. This increase in interests in humanoid robotics and related research in exoskeletons has led to the need of reliable embedded systems which is used to control the machines. These embedded systems are often required to be low in cost, scalable and robust. The specification required from the electronics and the embedded systems vary based on the robot’s capabilities. Also, there is a gap between the requirements of humanoid robots in research and in industrial setting. This work focuses on bridging the gap by proposing a solution which is semi-custom, low in cost, reliable and scalable. The work has been shown to perform as expected on the stat-of-art humanoid robot THOR which was built at Virginia Tech. Using the proposed design technique can not only deliver good performance but can also act as a quick prototyping tool for other robotics projects related to humanoid robotics and exoskeletons.

Internet of Things require a continuous power supply for longevity and energy harvesting from ambient sources enable sustainable operation of such embedded devices. Using selfpowered power supply gives raise two scenarios, where there is surplus or scarce harvested energy. In situations where the harvester is capable of harvesting beyond its storage capacity, the surplus energy is wasted. In situations where the harvester does not have sufficient resources, the sparse harvested energy can only transiently power the device. Transiently powered devices, referred to as intermittent computing devices, ensure forward progress by storing checkpoints of the device state at regular intervals. Irrespective of the availability of energy, the device should have adequate security. This thesis addresses the security of energy harvested embedded devices in both energy scenarios. First, we propose precomputation, an optimization technique, that utilizes the surplus energy. We study two cryptographic applications, namely bulk encryption and true random number generation, and we show that precomputing improves energy efficiency and algorithm latency in both applications. Second, we analyze the security pitfalls in transiently powered devices. To secure transiently powered devices, we propose the Secure Intermittent Computing Protocol. The protocol provides continuity to underlying application, atomicity to protocol operations and detects replay and tampering of checkpoints. Both the proposals together provide comprehensive security to self-powered embedded devices. / Master of Science / Internet of Things(IoT) is a collection of interconnected devices which collects data from its surrounding environment. The data collected from these devices enable emerging technologies like smart home and smart cities, where objects are controlled remotely. With the increase in the number of such devices, there is a demand for self-powered devices to conserve electrical energy. Energy harvesters are suitable for this purpose because they convert ambient energy into electrical energy to be stored in an energy buffer, which is to be used when required by the device. Using energy harvesters as power supply presents us with two scenarios. First, when there is sufficient ambient energy, the surplus energy, which is the energy harvested beyond the storage capacity of the buffer, is not consumed by the device and thus, wasted. Second, when the harvested energy is scarce, the device is forced to shutdown due to lack of power. In this thesis, we consider the overall security of an energy harvested IoT device in both energy scenarios. We optimize cryptographic algorithms to utilize the surplus energy and design a secure protocol to protect the device when the energy is scarce. Utilizing both the ideas together provides adequate security to the Internet of Things.

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