The main contents of this thesis are improving a UWB LNA, and analyze the input-matching, the noise, and the gain. First we increase the width of the input transistor, and remove source-degeneration inductor. Those ways can increase the gain and reduce the noise of the circuit. In the input matching, we use a shunt capacitor, a series inductor, and the impedance of the transistor itself to achieve high frequency matching. The lower frequency matching is achieved by negative feedback resistor. The UWB LNA dissipates 10.14 mW power and achieves input return loss (S11) below -11.5 dB, output return loss (S22) below -11.9 dB, forward gain (S21) of 14.4¡Ó0.4 dB, reverse isolation (S12) below -26.7 dB, and noise figure (NF) of 2.6~3.5 dB over the 3.1~10.6 GHz band of interest. 1-dB compression point (P1dB) of -16.8 dBm and input third-order inter-modulation point (IIP3) of -8.1 dBm are achieved at 6.85 GHz.

The main contents of this thesis are improving a UWB LNA, and analyze the input-matching, the noise, and the gain. First we use the feedback of the input transistor , and it different from the traditional source-degeneration inductor.The design can increase the gain and reduce the noise of the circuit.The second stage CS architecture designed to improve the overall gain of the circuit. Output level to use the source follower with the device even when the output matching . In the input matching,we use a shunt inductor and the impedance of the transistor itself to achieve high frequency matching. The UWB LNA dissipates 16.8 mW power and achieves input return loss (S11) -9.3 to -10 dB, output return loss (S22) -16.83 to -13 dB, forward gain (S21) 13.8 to 11.6 dB, reverse isolation (S12) below -30 dB, and noise figure (NF) of 2.38~3.31 dB over the 6~10 GHz band of interest. 1-dB compression point (P1dB) of -12.5 dBm and input third-order inter-modulation point (IIP3) of -2.5 dBm are achieved at 6 GHz.