System virtualization technology is widely used in computing nowadays. In embedded domain, it is used as a solution to resource sharing among independent applications. One of the areas is to apply virtualization technique to real-time embedded systems with timing constraints. Multi-level adaptive hierarchical scheduling (AdHierSched) framework is a virtualized real-time framework, which runs in the Linux operating system. Šis virtualized framework has ability to adapt the CPU partition sizes according to their need through monitoring their demand during run-time, which yields more appropriate processor assignment. However, the performance of the virtualized framework is still unknown when the budget borrowing mechanism is enabled. To this end, in this thesis, we explore a new direction for performing the adaptation of CPU partition. We design and implement a budget borrowing mechanism for dynamic adaptation of resource parameters in AdHierSched framework. Extensive simulations are performed in this thesis, which are used to study and compare di‚erent adaptation mechanisms with our approach. From the results of experiments, we conclude that when the framework works only with budget borrowing controller, the results are not as good as only running a budget controller in the AdHierSched framework. However, while running both of the controllers at the same time, the experiments results are good enough. We also analyze the overhead of the framework at the end of the evaluation. Finally, we conclude the thesis by presenting the possible future work.

In this thesis we propose a technique to preserve the temporal properties of realtime components during their integration and reuse. We propose a new concept of runnable virtual node which is a coarse-grained real-time component that provides functional and temporal isolation with respect to its environment. A virtual node’s interaction with the environment is bounded by both a functional and a temporal interface, and the validity of its internal temporal behaviour is preserved when integrated with other components or when reused in a new environment.   The first major contribution of this thesis is the implementation of a Hierarchical Scheduling Framework (HSF) on an open source real-time operating system (FreeRTOS) with the emphasis of doing minimal changes to the underlying FreeRTOS kernel and keeping its API intact to support the temporal isolation between a numbers of applications, on a single processor. Temporal isolation between the components during runtime prevents failure propagation between different components.   The second contribution of the thesis is with respect to the integration of components, where we first illustrate how the concept of the runnable virtual node can be integrated in several component technologies and, secondly, we perform a proof-of-concept case study for the ProCom component technology where we demonstrate the runnable virtual node’s real-time properties for temporal isolations and reusability.   We have performed experimental evaluations on EVK1100 AVR based 32-bit micro-controller and have checked the system behaviour during heavy-load and over-load situations by visualizing execution traces in both hierarchical scheduling and virtual node contexts. The results for the case study demonstrate temporal error containment within a runnable virtual node as well as reuse of the node in a new environment without altering its temporal behaviour. / PROGRESS

Minicell-based manufacturing system is used in identifying best minicell designs. The existing method of minicell design generates best minicell designs by designing and scheduling minicells simultaneously. While in this research designing of minicells and scheduling of jobs in minicells is done separately. This research evaluates the effectiveness of hierarchical approach and compares with simultaneous method. Minicell designs with respect to average flow times and machine capacities and both are identified in a multi-stage flow shop environment. Rules for the extraction of good minicell designs in mass customization manufacturing systems are also established.

This dissertation presents techniques to achieve predictable execution of coarse-grained software components and for preservation of temporal properties of components during their integration and reuse. The dissertation presents a novel concept runnable virtual node (RVN) which interaction with the environment is bounded both by a functional and a temporal interface, and the validity of its internal temporal behaviour is preserved when integrated with other components or when reused in a new environment. The realization of RVN exploits techniques for hierarchical scheduling to achieve temporal isolation, and the principles from component-based software-engineering to achieve functional isolation. The proof-of-concept case studies executed on a micro-controller demonstrate the preserving of real-time properties within software components for predictable integration and reusability in a new environment, in both hierarchical scheduling and RVN contexts. Further, a multi-resource server (MRS) is proposed and implemented to enable predictable execution when composing multiple real-time components on a COTS multicore platform. MRS uses resource reservation for both CPU-bandwidth and memory-bus bandwidth to bound the interferences between tasks running on the same core, as well as, between tasks running on different cores. The later could, without MRS, interfere with each other due to contention on a shared memory-bus and memory. The results indicated that MRS can be used to "encapsulate" legacy systems and to give them enough resources to fulfill their purpose. In the dissertation, the compositional schedulability analysis for MRS is also provided and an experimental study is performed to bring insight on the correlation between the server budgets. We believe that the proposed approaches enable a faster software integration and support legacy reuse and that this work transcend the boundaries of software engineering and real-time systems. / PPMSched / PROGRESS

Mode switches are used to partition the system’s behavior into different modes to reduce the complexity of large embedded systems. Such systems is said to operate in multiple modes where each mode corresponds to a specific application scenario, are called Multi-Mode Systems (MMS). Normally, a different piece of software is executed for each mode. At a specific time, the system can be in one of the predefined modes and is switched from one mode to another upon some condition. A mode switch mechanism (or mode change protocol) is used to transform the system from one mode to another at run-time.In this thesis we have used a hierarchical scheduling framework to implement a multi-mode system, called Multi-Mode Hierarchical Scheduling Framework (MMHSF). A two-level Hierarchical Scheduling Framework (HSF) has already been implemented in an open source real-time operating system, FreeRTOS, to support temporal isolation among real-time components. The main contribution in this thesis is the extension of the HSF with the multi-mode feature with the emphasis of doing minimal changes in the underlying operating system FreeRTOS and its HSF implementation. Our implementation uses fixed-priority preemptive scheduling at both local and global scheduling levels and idling periodic servers. The implementation now supports different modes of the system which can be switched at run-time Each subsystem and task exhibit different timing attributes for different modes, and upon a Mode Change Request (MCR) the task-set and timing interfaces of the whole system (including subsystems and tasks) are changed. A Mode Change Protocol specifies the way to change the system-mode. An application may not only need to change a mode but also a different mode change protocol semantic. For example, the mode change from normal to shutdown can allow all the tasks to be completed before the mode is changed. While changing a mode from normal to emergency may require aborting all the tasks instantly. In our work, both the system mode and the mode change protocol can be changed at run-time. We have implemented three different mode change protocols to switch from one mode to another: the Suspend/resume protocol, Abort protocol and Complete protocol. These protocols increase the flexibility of the system, letting the users to select the way they want to switch to the new mode.The implementation of MMHSF is tested and evaluated on an AVR-based 32 bit board EVK1100 with an AVR32UC3A0512 micro-controller. We have tested the behavior of each mode of the system and for each mode change protocol. We also provide the results for the performance measures of all mode change protocols in the thesis.

Recent advancements of multiprocessor architectures have led to increasing use of multiprocessors in real-time embedded systems. The two most popular real-time scheduling approaches in multiprocessors are global and partitioned scheduling. Cluster based multiprocessor scheduling can be seen as a hybrid approach combining benefits of both partitioned and global scheduling. Virtual clustering further enhances it by providing dynamic cluster resource allocation duringrun-time and applying hierarchical scheduling to ensure temporal isolation between different software components. Over the years, the study of virtual clustered-based multiprocessor scheduling has been limited to theoretical analysis. In this thesis, we implemented a Virtual-Clustered Hierarchical Scheduling Framework (VC-HSF) in Linux without modifying the base Linux kernel. This work includes complete design, implementation and experimentation of this framework in a multiprocessor platform. Our main contributions are twofold: (i) to the best of our knowledge, our work is the first implementation of any virtual-clustered real-time multiprocessor scheduling in an operating system, (ii) our design and implementation gives practical insights about challenges of implementing any virtual-clustered algorithms for real-time scheduling.

Este trabalho apresenta um modelo de escalonamento hierárquico para exploração do paralelismo E Independente e do paralelismo OU na programação em lógica. O modelo utiliza informações de granulosidade geradas pelo GRANLOG (Granularity Analyzer for Logic Programming) para o auxílio ao escalonamento. Um estudo detalhado de ambientes de programação em lógica explorando o paralelismo é apresentado. A partir deste, é feita uma comparação destacando as principais características de cada um. O escalonamento em linhas gerais também é descrito e uma enfâse maior é dada ao escalonamento dinâmico. As principais vantagens e desvantagens de cada escalonador são mostradas. O modelo proposto recebe o nome de DSLP – Distributed Scheduler for Logic Programming e realiza o escalonamento em duas fases. Inicialmente é executada a Fase OU, na qual todo paralelismo OU é explorado. Em seguida, é iniciada a Fase E onde ocorre a exploração do paralelismo E Independente. A estratégia de escalonamento proposta, utiliza informações de complexidade do GRANLOG para determinar o trabalho a ser exportado, bem como o nível de sobrecarga dos nodos. Para validação do trabalho, um protótipo utilizando o ambiente Parallel Virtual Machine foi implementado. O protótipo é um simulador de programas Prolog e implementa a fase E de escalonamento. / This work presents a hierarchical scheduling model for exploration of the Independent AND parallelism and OR parallelism in logic programming. The model uses granularity information generated by GRANLOG (Granularity Analyzer for Logic Programming) to aid the scheduler. A detailed study of parallel logic programming environments is presented. Starting from this, it is made a comparison highlighting the main characteristics of each one. Scheduling in general is also described and the dynamic scheduling is pointed out. The main advantages and disadvantages of each scheduler are shown. The proposed model receives the name of DSLP – Distributed Scheduler for Logic Programming and it accomplishes the scheduling in two phases. Initially the OR Phase is executed and the whole OR parallelism is explored. Soon after, it is initiate the AND Phase with the exploration of the Independent AND parallelism. The scheduling strategy proposed uses complexity information generated by GRANLOG to determinate the task to be exported, as well as the nodes overloaded level. For work validation, a prototype using the Parallel Virtual Machine was implemented. The prototype is a Prolog simulator and it implements the scheduling AND phase.

Este trabalho apresenta um modelo de escalonamento hierárquico para exploração do paralelismo E Independente e do paralelismo OU na programação em lógica. O modelo utiliza informações de granulosidade geradas pelo GRANLOG (Granularity Analyzer for Logic Programming) para o auxílio ao escalonamento. Um estudo detalhado de ambientes de programação em lógica explorando o paralelismo é apresentado. A partir deste, é feita uma comparação destacando as principais características de cada um. O escalonamento em linhas gerais também é descrito e uma enfâse maior é dada ao escalonamento dinâmico. As principais vantagens e desvantagens de cada escalonador são mostradas. O modelo proposto recebe o nome de DSLP – Distributed Scheduler for Logic Programming e realiza o escalonamento em duas fases. Inicialmente é executada a Fase OU, na qual todo paralelismo OU é explorado. Em seguida, é iniciada a Fase E onde ocorre a exploração do paralelismo E Independente. A estratégia de escalonamento proposta, utiliza informações de complexidade do GRANLOG para determinar o trabalho a ser exportado, bem como o nível de sobrecarga dos nodos. Para validação do trabalho, um protótipo utilizando o ambiente Parallel Virtual Machine foi implementado. O protótipo é um simulador de programas Prolog e implementa a fase E de escalonamento. / This work presents a hierarchical scheduling model for exploration of the Independent AND parallelism and OR parallelism in logic programming. The model uses granularity information generated by GRANLOG (Granularity Analyzer for Logic Programming) to aid the scheduler. A detailed study of parallel logic programming environments is presented. Starting from this, it is made a comparison highlighting the main characteristics of each one. Scheduling in general is also described and the dynamic scheduling is pointed out. The main advantages and disadvantages of each scheduler are shown. The proposed model receives the name of DSLP – Distributed Scheduler for Logic Programming and it accomplishes the scheduling in two phases. Initially the OR Phase is executed and the whole OR parallelism is explored. Soon after, it is initiate the AND Phase with the exploration of the Independent AND parallelism. The scheduling strategy proposed uses complexity information generated by GRANLOG to determinate the task to be exported, as well as the nodes overloaded level. For work validation, a prototype using the Parallel Virtual Machine was implemented. The prototype is a Prolog simulator and it implements the scheduling AND phase.

Este trabalho apresenta um modelo de escalonamento hierárquico para exploração do paralelismo E Independente e do paralelismo OU na programação em lógica. O modelo utiliza informações de granulosidade geradas pelo GRANLOG (Granularity Analyzer for Logic Programming) para o auxílio ao escalonamento. Um estudo detalhado de ambientes de programação em lógica explorando o paralelismo é apresentado. A partir deste, é feita uma comparação destacando as principais características de cada um. O escalonamento em linhas gerais também é descrito e uma enfâse maior é dada ao escalonamento dinâmico. As principais vantagens e desvantagens de cada escalonador são mostradas. O modelo proposto recebe o nome de DSLP – Distributed Scheduler for Logic Programming e realiza o escalonamento em duas fases. Inicialmente é executada a Fase OU, na qual todo paralelismo OU é explorado. Em seguida, é iniciada a Fase E onde ocorre a exploração do paralelismo E Independente. A estratégia de escalonamento proposta, utiliza informações de complexidade do GRANLOG para determinar o trabalho a ser exportado, bem como o nível de sobrecarga dos nodos. Para validação do trabalho, um protótipo utilizando o ambiente Parallel Virtual Machine foi implementado. O protótipo é um simulador de programas Prolog e implementa a fase E de escalonamento. / This work presents a hierarchical scheduling model for exploration of the Independent AND parallelism and OR parallelism in logic programming. The model uses granularity information generated by GRANLOG (Granularity Analyzer for Logic Programming) to aid the scheduler. A detailed study of parallel logic programming environments is presented. Starting from this, it is made a comparison highlighting the main characteristics of each one. Scheduling in general is also described and the dynamic scheduling is pointed out. The main advantages and disadvantages of each scheduler are shown. The proposed model receives the name of DSLP – Distributed Scheduler for Logic Programming and it accomplishes the scheduling in two phases. Initially the OR Phase is executed and the whole OR parallelism is explored. Soon after, it is initiate the AND Phase with the exploration of the Independent AND parallelism. The scheduling strategy proposed uses complexity information generated by GRANLOG to determinate the task to be exported, as well as the nodes overloaded level. For work validation, a prototype using the Parallel Virtual Machine was implemented. The prototype is a Prolog simulator and it implements the scheduling AND phase.