Unified Diagnostic Service (UDS), which is an international and not a company-specific standard, is used in almost all new electronic control units (ECUs) by now. Modern vehicles have a diagnostic interface for off-board diagnostics, which makes it possible to connect a diagnostic tool to the vehicle’s bus system like Controller Area Network (CAN) and Local Interconnect Network (LIN). However, as the most commonly used method, sequential method on the UDS data transmission over LIN does not only result in low reliability and flexibility but also fails to meet the standard for LIN development defined in the latest LIN specification published by the consortium. With standard workflow and application interfaces, this Master Thesis will develop and evaluate a database-based method to build a UDS system over LIN, where all the information for the network is defined in the LIN database, and the protocol properties are realized in a reusable model so that it can be easily reconfigured for the future development of other services. As a result, a new method including a layered-structure LIN protocol model and a LIN database has been successfully designed and implemented. The prototype is built on the device PIC32MX795, and the database can be deployed by the configuration tool to specify the UDS communication schedule. Further, several performance evaluations have been performed. The tests indicate that the system is qualified on the limited hardware platform and the configuration flexibility is proved by different databases. / Unified Diagnostic Service (UDS), som är en internationell och inte en företagsspecifik standard, används nu i nästan alla nya elektroniska styrenheter (ECU). Moderna fordon har ett diagnostiskt gränssnitt för diagnostik utanför kortet, vilket gör det möjligt att ansluta ett diagnostiskt verktyg till fordonets bussystem som Controller Area Network (CAN) och Local Interconnect Network (LIN). Som den mest använda metoden resulterar emellertid sekventiell metod på UDS-dataöverföringen via LIN inte bara i låg tillförlitlighet och flexibilitet utan uppfyller också standarden för LINutveckling som definieras i den senaste LIN-specifikationen publicerad av konsortiet. Med standard arbetsflöde och applikationsgränssnitt kommer denna masteruppsats att utveckla och utvärdera en databas-baserad metod för att bygga ett UDS-system över LIN, där all information för nätverket definieras i LIN-databasen, och protokollegenskaperna realiseras i en återanvändbar modell så att den enkelt kan konfigureras för framtida utveckling av andra tjänster. Som ett resultat har en ny metod som inkluderar en LIN-protokollmodell med skiktstruktur och en LIN-databas framgångsrikt designats och implementerats. Prototypen är byggd på enheten PIC32MX795, och databasen kan konfigureras av verktyget för att ange UDSkommunikationsschema. Vidare har flera prestationsutvärderingar genomförts. Testen indikerar att systemet är kvalificerat på den begränsade hårdvaruplattformen och konfigurationsflexibiliteten bevisas av olika databaser.

Networks-on-Chip (NoCs) are a general purpose, scalable replacement for shared medium wired interconnects offering many practical applications in industry. Dynamic Voltage Frequency Scaling (DVFS) is a technique whereby a chip?s voltage-frequency levels are varied at run time, often used to conserve dynamic power. Various DVFSbased NoC optimization techniques have been proposed. However, due to the resources required to validate architectural decisions through prototyping, few are implemented. As a result, designers are faced with a lack of insight into potential power savings or performance gains at early architecture stages. This thesis proposes a DVFS aware NoC simulator with support for per node power-frequency modeling to allow fine-tuning of such optimization techniques early on in the design cycle. The proposed simulator also provides a framework for benchmarking various candidate strategies to allow selective prototyping and optimization. As part of the research, DVFS extensions were built for an existing NoC performance simulator and released for public use. This thesis presents some of the preliminary results from our simulator that show the average power consumed per node for all the benchmarks in SPLASH 2 benchmark suite [74] to be quite similar to each other. This thesis also serves as a technical manual for the simulator extensions. Important links for downloading and using the simulator are provided at the end of this document in Appendix C.

Current trends in electronic industry, such as Internet of Things (IoT) and Cloud Computing call for high interconnect bandwidth, increased number of active devices and high IO count. Hence the integration of on silicon optical waveguides becomes an alternative approach to cope with the performance demands. The application and fabrication of horizontal (planar) and vertical (Through Silicon Vias - TSVs) optical waveguides are discussed here. Coupling elements are used to connect both waveguide structures. Two micro-structuring technologies for integration of coupling elements are investigated: μ-mirror fabrication by nanoimprint (i) and dicing technique (ii). Nanoimprint technology creates highly precise horizontal waveguides with polymer (refractive index nC = 1.56 at 650 nm) as core. The waveguide ends in reflecting facets aligned to the optical TSVs. To achieve Total Internal Reflection (TIR), SiO2 (nCl = 1.46) is used as cladding. TSVs (diameter 20-40μm in 200-380μm interposer) are realized by BOSCH process1, oxidation and SU-8 filling techniques. To carry out the imprint, first a silicon structure is etched using a special plasma etching process. A polymer stamp is then created from the silicon template. Using this polymer stamp, SU-8 is imprinted aligned to vertical TSVs over Si surface.Waveguide dicing is presented as a second technology to create coupling elements on polymer waveguides. The reflecting mirror is created by 45° V-shaped dicing blade. The goal of this work is to develop coupling elements to aid 3D optical interconnect network on silicon interposer, to facilitate the realization of the emerging technologies for the upcoming years.