We have demonstrated a flexible optical waveguide film with integrated VCSEL and PIN photodiode arrays for the fully embedded board level optical interconnection system. One of the most critical issues in the fully embedded board level optical interconnection system is the signal beam coupling between the guided-wave structure and the aperture of VCSEL (or PIN photodiode). The coupling efficiencies of spherical mirrors are calculated as a function of mirror radius. The optimum mirror radius ranges which are compatible with the fully embedded board level optical interconnection system are theoretically verified. The thermal characteristics of a thin film VCSEL are studied both theoretically and experimentally. The thermal resistances of VCSEL with variable thickness, ranging from 10 [mu]m to 200 [mu]m, have been determined by measuring the output wavelength shift as a function of the dissipated power. The thermal simulation results agree reasonably well with experimentally measured data. From the thermal management point of view, a thinned VCSEL has an exclusive advantage due to the reduction of the thermal resistance. The thermal resistance of 10 [mu]m thick VCSEL is 40 % lower than that of 200 [mu]m thick VCSEL. The theoretical analysis of thermal via effects is performed to determine optimized thickness ranges of thin film VCSEL for the fully embedded structure. Thermal resistance of the fully embedded thin film VCSEL with closed and open thermal via structures are also evaluated with the suitable VCSEL thickness reported. The high-performance computing system is demonstrated using a 16-channel optical backplane using thin film volume holographic gratings. The optical backplane contains TO-46-Can-packaged VCSELs and photodiodes as an optical transmitter and receiver, respectively. Optical packaging plates are fabricated for 4 X 8 array packaging for 16-VCSELs and 16-Photodiodes. Packaging issues including crosstalk and alignment tolerance are studied to design a low cost optical packaging scheme. Thin film volume hologram grating is fabricated on glass substrate to redirect light beams. An individual single channel performs at a 100 MHz data transfer rate. The high-performance computing system using 16-channel optical backplane is demonstrated at a 1.6 Gbps data transmission. / text

This thesis deals with design and implementation of interconnection bus system for chips with FPGA technology. The system ensures both communication between internal components on a chip and their communication with other computer elements which are mapped to the host system memory. The buses are high-speed, full duplex and packet-oriented and their architecture is based on tree topology. The data width is configurable, individually for every bus part. Due to this feature, it is possible to build uniform hierarchical system of internal buses with different speed that interconnects differently fast components. Proposed interconnection system was implemented in VHDL language and it is utilized in the Liberouter project which is the part of CESNET research intention Programable Hardware.