The research presented in this thesis has been concerned with the use of parallel logic systems for the implementation of large knowledge bases. The thesis describes proposals for a parallel logic system based on a new logic programming language, the Pure Logic Language. The work has involved the definition and implementation of a new logic interpreter which incorporates the parallel execution of independent OR processes, and the specification and design of an appropriate non shared memory multiprocessor architecture. The Pure Logic Language which is under development at JeL, Bracknell, differs from Prolog in its expressive powers and implementation. The resolution based Prolog approach is replaced by a rewrite rule technique which successively transforms expressions according to logical axioms and user defined rules until no further rewrites are possible. A review of related work in the field of parallel logic language systems is presented. The thesis describes the different forms of parallelism within logic languages and discusses the decision to concentrate on the efficient implementation of OR parallelism. The parallel process model for the Pure Logic Language uses the same execution technique of rule rewriting but has been adapted to implement the creation of independent OR processes and the required message passing operations. The parallelism in the system is implemented automatically and, unlike many other parallel logic systems there are no explicit program annotations for the control of parallel execution. The spawning of processes involves computational overheads within the interpreter: these have been measured and results are presented. The functional requirements of a multiprocessor architecture are discussed: shared memory machines are not scalable for large numbers of processing elements, but, with no shared memory, data needed by offspring processors must be copied from the parent or else recomputed. The thesis describes an optimised format for the copying of data between processors. Because a one-to-many communication pattern exits between parent and offspring processors a broadcast architecture is indicated. The development of a system based on the broadcasting of data packets represents a new approach to the parallel execution of logic languages and has led to the design of a novel bus based multiprocessor architecture. A simulation of this multiprocessor architecture has been produced and the parallel logic interpreter mapped onto it: this provides data on the predicted performance of the system. A detailed analysis of these results is presented and the implications for future developments to the proposed system are discussed.

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Forgetting is an operation which removes information from a set of logical statements, such that a) the language used by the logic is simplified; and b) as much information as possible from the original logical statements are preserved. Forgetting operations are useful in a variety of contexts, including knowledge representation, where it is necessary to have an operation for removing information from knowledge bases; and the problem of relevance, where logical statements are simplified by removing irrelevant information. In this thesis we consider forgetting operations on logic programs with negation-as-failure according to the stable model semantics. There are existing notions of forgetting on logic programs in the literature: the strong forgetting and weak forgetting of Zhang and Foo, and the semantic approach to forgetting introduced by Wang et al. However, these notions are inadequate: the strong and weak forgettings are defined syntactically with no obvious connections to semantic notions of forgetting; while the semantic approach of Wang et al. does not take into account ``hidden'' information encoded in unused rules. The idea of equivalence on logic programs capture the extent of information contained in a logic program. We consider that two logic programs are equivalent iff the two programs contain the same information. For logic programs, there are many different possible notions of equivalence. We look at the well-known notion of strong equivalence and a new notion of equivalence which we call T-equivalence. Associated with each of these equivalences is a consequence relation on logic program rules. We present sound and complete set of inference rules for both consequence relations. We present a novel approach to logic program forgetting which uses as its basis a set of postulates, which are defined relative to a notion of equivalence. We show that if we use T-equivalence as the equivalence relation, then the only possible forgetting operations (up to equivalence) are strong forgetting and weak forgetting. If strong equivalence is used instead, then there are also only two possible forgetting operations (up to equivalence).

Thesis (Ph.D.)--Hong Kong University of Science and Technology, 2003. / Includes bibliographical references (leaves 104-112). Also available in electronic version. Access restricted to campus users.

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No description available.

Forgetting is an operation which removes information from a set of logical statements, such that a) the language used by the logic is simplified; and b) as much information as possible from the original logical statements are preserved. Forgetting operations are useful in a variety of contexts, including knowledge representation, where it is necessary to have an operation for removing information from knowledge bases; and the problem of relevance, where logical statements are simplified by removing irrelevant information. In this thesis we consider forgetting operations on logic programs with negation-as-failure according to the stable model semantics. There are existing notions of forgetting on logic programs in the literature: the strong forgetting and weak forgetting of Zhang and Foo, and the semantic approach to forgetting introduced by Wang et al. However, these notions are inadequate: the strong and weak forgettings are defined syntactically with no obvious connections to semantic notions of forgetting; while the semantic approach of Wang et al. does not take into account ``hidden'' information encoded in unused rules. The idea of equivalence on logic programs capture the extent of information contained in a logic program. We consider that two logic programs are equivalent iff the two programs contain the same information. For logic programs, there are many different possible notions of equivalence. We look at the well-known notion of strong equivalence and a new notion of equivalence which we call T-equivalence. Associated with each of these equivalences is a consequence relation on logic program rules. We present sound and complete set of inference rules for both consequence relations. We present a novel approach to logic program forgetting which uses as its basis a set of postulates, which are defined relative to a notion of equivalence. We show that if we use T-equivalence as the equivalence relation, then the only possible forgetting operations (up to equivalence) are strong forgetting and weak forgetting. If strong equivalence is used instead, then there are also only two possible forgetting operations (up to equivalence).

Thesis (Ph. D.)--Ohio State University, 2004. / Title from first page of PDF file. Document formatted into pages; contains xv, 170 p. : ill. Advisors: Timothy J. Long and John S. Schlipf, Department of Computer Science and Engineering. Includes bibliographical references (p. 165-170).

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