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The Global ETD Search service is a free service for researchers
to find electronic theses and dissertations. This service is
provided by the
Networked Digital Library of Theses and Dissertations.
Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
Search results
Showing 1 to 10 of 609 (0.084 seconds)| 1 |
Low noise operation in deep depletion mode MOS transistorsCarruthers, Colin January 1989 (has links)
No description available.
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Coulomb blockade in silicon-on-insulatorAli, Danish January 1994 (has links)
No description available.
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Anodisation and study of oxide films formed on zirconiumBowen, Andrew January 1989 (has links)
No description available.
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Generation of substrate bias and current sources in CMOS technologyZhang, Jing, 1962- 27 November 1995 (has links)
A negatively biased substrate has several advantages over a grounded substrate in CMOS
technology. The on-chip generation of this negative substrate bias has made chips easier
to use when only a single supply is preferred. This project demonstrates two types of
charge pump circuits used to generate negative voltages not only for biasing the substrate,
but in a broader sense also for other purposes in CMOS technology. One other possible
use is in conjunction with 'Guard Ring Diodes for Suppressing the Substrate Noise in
Mixed-Mode CMOS Circuits'. This work proposes a reasonable approach to generate the
forward biasing current for the guard ring diode whose depletion capacitance and the
substrate lead inductance form a resonant circuit to provide very low substrate-to-ground
impedance at specific frequencies. Given this emphasis on generating a reasonably
predictable current source, the generated negative voltages are regulated using a feedback
loop. The amplitude of this negative voltage can be determined exclusively by transistor
sizes.
Simulation results support the theoretical analysis in that accurate negative voltages and
current sources can be generated on-chip, although there are some limitations. / Graduation date: 1996
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Synthesis of porous monoclinic tungsten oxides and their application in sensors /Waghe, Anil Bhalchandra. January 2003 (has links) (PDF)
Thesis (Ph. D.) in Chemistry--University of Maine, 2003. / Includes vita. Includes bibliographical references (leaves 116-124).
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Advanced fabrication processes for sub-50nm CMOSHussain, Muhammad Mustafa 28 August 2008 (has links)
Not available / text
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Analysis and design of n-channel MOS transistors for operation at 300°CCosentino, Stephen Joseph January 1980 (has links)
No description available.
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N-Well CMOS process integration /Price, David T. January 1992 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 1992. / Typescript. Includes bibliographical references (leaf 63).
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High IIP2 CMOS doubly balanced quadrature sub-harmonic mixer for 5 GHz direct conversion receiverUpadhyaya, Parag, January 2005 (has links) (PDF)
Thesis (M.S. in electrical engineering)--Washington State University. / Includes bibliographical references.
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Charge trapping in ultra-thin MOS dielectrics /Martin, Matthew G., January 1999 (has links)
Thesis (Ph. D.)--Lehigh University, 1999. / Includes vita. Bibliography: leaves 240-249.
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