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The adoption of Application Specific Integrated Circuit (ASIC) technology by the UK manufacturing baseMcArdle, Christopher January 1997 (has links)
Since the late 1970s, families of microelectronic technologies that could bring the advantages of high levels of electronic integration have been available at reasonable prices and manageable risk to all sectors of UK industry. However, the uptake of these technologies has been painfully slow, particularly by the small and medium enterprises (SMEs) that make up most of the companies currently operating in the UK. It is the aim of the research described here to assess how slow the uptake has been, the reasons for it, and possible solutions to the problem. The problem is investigated with reference to SMEs. In order to reach conclusions it has been necessary to:- • Define Application Specific Integrated Circuit (ASIC) technology and review its history • Review that nature of the UK SME base and identify why they should use ASICs • Review the UK, European and World ASIC markets • Analyse the nature of the UK ASIC design and supply industry • Ascertain the reasons for non-adoption and assess their validity • Relate the findings of this research to appropriate business, organisational and system models • Review past and existing technology-transfer programmes operating in the area of ASIC adoption at a UK, European and world level • Compare the adoption of ASIC technology with the adoption of similar, wide-ranging, new technologies The study concludes that the technology is unique in the wide range of industries to which it can be applied, and that although some advances in adoption have been made, there remains a significant number of hurdles to adoption which can best be addressed by government intervention and supporting activity from supply-companies, trade associations, user-groups and professional and educational institutions. Only once adoption has reached a 'critical mass' can it be assumed that a self-sustaining market will result.
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Etude du transport électronique dans les nanodispositifs semiconducteurs par microscopie à grille locale / Study of electron transport in semiconductor nanodevices by Scanning Gate MicroscopyLiu, Peng 30 September 2011 (has links)
La microscopie de grille à balayage (SGM pour Scanning GateMicroscopy), développée à la fin des années 1990, est devenue un outilpuissant pour étudier les propriétés électroniques locales dans lesnano-dispositifs semi-conducteurs. La SGM est basée sur la techniqueAFM, mais la pointe métallique est utilisée comme une grille mobilecouplée capacitivement au dispositif, et les propriétés de transportélectronique sont étudiées sous l'influence de cette grille,fournissant des informations spatiales à haute résolution. Cette thèsedécrit d'abord le remplacement de la détection optique de notresystème AFM par une détection piézo-électrique utilisant un diapason àquartz, puis les résultats de mesures SGM sur divers nano-dispositifs,qui sont tous fabriqués à partir d'hétérostructures InGaAs / InAlAscontenant un gaz d'électrons bi-dimensionnel (2DEG) de grande mobilitésitué à quelques dizaines de nanomètres sous la surface. Sur unesimple constriction, nous étudions l'interaction pointe-échantillonavec deux approches: la force électrostatique et l'effet capacitif.Sur une boite quantique, nous étudions les phénomènes de blocage deCoulomb lorsque la pointe est utilisée comme une grille pour modulerla charge à l'intérieur de la boite. Dans un travail sur le paradoxede Braess, avec l'aide de simulations numériques, nous découvrons uneffet paradoxal en modulant la largeur du canal central dans undispositif mésoscopique en forme de double anneau, en analogie avec leparadoxe qui se produit dans un réseau classique. Par une étudedétaillée de l'évolution de la conductance, nous découvrons enfinplusieurs pièges de charge dans les images SGM, et proposons un modèlepour interpréter le changement de conductance en présence de pièges decharge. Nous développons alors une méthode pour imager directement lespièges de charge par des mesures de transconductance avec unemodulation de la tension sur la pointe. / Scanning gate microscopy (SGM), developed in the late 1990's, has become a powerful tool to investigate the local electronic properties in semiconductor nano devices. SGM is based on the AFM technique but the metallic tip is used as a movable gate capacitively coupled to the device, and the electron transport property is studied on influence of this gate, providing spatial information with high resolution. This thesis presents the update of the force detection mode of our AFM system from optical method to force sensing by a quartz tuning fork, and the SGM measurement results on various nano devices, all of which are fabricated from InGaAs/InAlAs heterostructures containing a high mobility 2DEG located a few tens of nanometers below the surface. On a 2DEG constriction, we investigate the tip-sample interaction with two approaches: the capacitive force and the gate effect. On a quantum dot, we study the Coulomb blockade phenomena where the tip is used as a gate to modulate the charging/discharging inside the dot. In a work on Braess paradox, with the help of numerical simulations, we discover a Braess paradox effect by modulating a channel width in a ‘double-ring' shaped mesoscopic device in analogy with the one that occurs in a classical network. By a detailed study of the conductance changes, we discover several charge traps from the SGM map, and propose a model to interpret the conductance change with the presence of charge traps. We develop a method to directly image the charge traps by transconductance measurements with a voltage modulation on the tip.
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