An antenna array is overloaded when the number of cochannel signals in its operating environment exceeds the number of elements. Conventional space-time array processing for narrow-band signals fails in overloaded environments. Overloaded array processing (OLAP) is most difficult when signals impinging on the array are near equal power, have tight excess bandwidth, and are of identical signal type. Despite the failure of conventional beamforming in such environments, OLAP becomes possible when a receiver exploits additional signal properties such as the finite-alphabet property and signal excess-bandwidth. This thesis proposes three approaches to signal extraction in overloaded environments, each providing a different tradeoff in performance and complexity. The first receiver architecture extracts signals from an overloaded environment through the use of MMSE interference rejection filtering embedded in a successive interference cancellation (SIC) architecture. The second receiver architecture enhances signal extraction performance by embedding a stronger interference rejection receiver, the reduced-state maximum aposteriori probability (RS-MAP) algorithm in a similar SIC architecture. The third receiver fine-tunes the performance of spatially reduced search joint detection (SRSJD) with the application of an energy focusing transform (EFT), a complexity reducing front-end linear pre-processor. A new type of EFT, the Energy Focusing Unitary Relaxed Transform (EFURT) is developed. This transform facilitates a continuous tradeoff between noise-enhancement and error-propagation in an SRSJD framework. EFURT is used to study the role of this tradeoff for SRSJD receivers in a variety of signal environments. It is found that for the environments studied in this thesis, SRSJD enjoys an aggressive reduction in interference at the expense of possible noise-enhancement. / Ph. D.

Multi-robot systems (MRS) offer many performance benefits over single robots for tasks that can be completed by one robot. They offer potential redundancies to the system to improve robustness and allow tasks to be completed in parallel. These benefits, however, can be quickly offset by losses in productivity from diminishing returns caused by interference between robots and communication problems. This dissertation developed and evaluated MRS control architectures to solve the dynamic multi-robot autonomous routing problem. Dynamic multi-robot autonomous routing requires robots to complete a trip from their initial location at the time of task allocation to an assigned destination. The primary concern for the control architectures was how well the communication requirements and overall system performance scaled as the number of robots in the MRS got larger. The primary metrics for evaluation of the controller were the effective robot usage rate and the bandwidth usage. This dissertation evaluated several different approaches to solving dynamic multi-robot autonomous routing. The first three methods were based off of common MRS coordination approaches from previous research. These three control architectures with distributed control without communication (a swarm-like method), distributed control with communication, and centralized control. An additional architecture was developed to solve the problem in a way that scales better as the number of robots increase. This architecture, mixed mode autonomy, combines the strengths of distributed control with communication and centralized control. Like distributed control with communication, mixed mode autonomy's performance degrades gracefully with communication failures and is not dependent on a single controller. Like centralized control, there is oversight from a central controller to ensure repeatable high performance of the system. Each of the controllers other than distributed control without communication is based on building world models to facilitate coordination of the routes. A second variant of mixed mode autonomy was developed to allow robots to share parts of their world models with their peers when their models were incomplete or outdated. The system performance was evaluated for three example applications that represent different cases of dynamic multi-robot autonomous routing. These example applications were the automation of open pit mines, container terminals, and warehouses. The effective robot usage rates for mixed mode autonomy were generally significantly higher than the other controllers with a higher numbers of robots. The bandwidth usage was also much lower. These performance trends were also observed across a wide range of operating conditions for dynamic multi-robot autonomous routing. The original contributions from this work were the development of a new MRS control architecture, development of system model for the dynamic multi-robot autonomous routing problem, and identification of the tradeoffs for MRS design for the dynamic multi-robot autonomous routing problem. / Ph. D.

A new power conditioning system (PCS) for superconductive magnetic energy storage (SMES) is developed and its prototype test system is built and tested. The PCS uses IGBTs for high-speed PWM operation and has a multi-level chopper-VSC structure. The prototype test system has three-level that can handle up to 250-kVA with a 1800-V DC link, a 200-A maximum load current , and a switching frequency reaching 20-kHz with the help of zero-current-transition (ZCT) soft-switching. This PCS has a great number of advantages over conventional ones in terms of size, speed, and cost. Conventional PCSs use thyristors, due to the power capacity of the SMES system. The speed limit of the thyristor uses a six-pulse operation that generates a high harmonic. To reduce the harmonic, multiple PCSs are connected together with phase-matching transformers that need to be precise to be effective in reducing the harmonics. So, the system becomes large and expensive. In addition, the dynamic range of the PCSs are also limited by the six-pulse operation, because it limits the useful area of the PCS applications. By employing a high-speed PWM, the new PCS can reduce the harmonics without using the transformers reducing size and cost, and has wide dynamic range. However, the speed of a switching device is generally inversely proportional to its power handling capacity. Therefore, employing a multi-level structure is one method of extending the power-handling capability of the high-speed device. Switching loss is another factor that limits the speed of the switch, but it can be reduced by soft-switching techniques. The 20-kHz switching frequency can be obtained with the help of the ZCT soft-switching technique, which can reduce about 90% of switching losses from the IGBT during both turn-on and turn-off transients. There are two different topologies of the PCS; the current source converter (CSC) type and the chopper and voltage source converter (VSC) type. In terms of the SMES system efficiency, the chopper-VSC type shows a less volt-ampere requirement of the power device. Therefore, the new PCS system has a chopper-VSC structure. Since the chopper-VSC structure consists of multiple legs that can be modularized, a power electronics building block (PEBB) leg is a good choice; all of the system problems caused by the high frequency can be solved within the PEBB leg. The VSC is built with three of the PEBB legs. Three-phase AC is implemented with a three-level space vector modulation (SVM) that can reduce the number of switching and harmonic contents from the output current. A closed-loop control system is also implemented for the VSC, and shows 600-Hz control bandwidth. The multi-level structure used requires too many high-speed switches. However, not all of them are used at the same time during normal multi-level operation. A new multi-level topology is suggested that requires only two high-speed switches, regardless of the number of levels. Other switches can be replaced with slow-speed switches that can allow additional cost savings. / Ph. D.

Antibiotic resistance is currently a global threat spanning clinical, environmental, and geopolitical research domains. The environment is increasingly recognized as a key node in the spread of antibiotic resistance genes (ARGs), which confer antibiotic resistance to bacteria. Detecting ARGs in the environment is the first step in monitoring and controlling antibiotic resistance. In recent years, next-generation sequencing of environmental samples (metagenomic sequencing data) has become a prolific tool for the field of surveillance. Metagenomic data are nucleic acid sequences, or nucleotides, of environmental samples. Metagenomic sequencing data has been used over the years to detect and analyze ARGs. An intriguing instance of ARGs is the multi-functional ARG, where one ARG encodes two or more different antibiotic resistance functions. Multi-functional ARGs provide resistance to two or more antibiotics, thus should have evolutionary advantage over ARGs with resistance to single antibiotic. However, there is no tool readily available to detect these multi-functional ARGs in metagenomic data. In this study, we develop a computational pipeline to detect multi-functional ARGs in metagenomic data. The pipeline takes raw metagenomic data as the input and generates a list of potential multi-functional ARGs. A plot for each potential multi-functional ARG is also created, showing the location of the multi-functionalities in the sequence and the sequencing coverage level. We collected samples from three different sources: influent samples of a wastewater treatment plant, hospital wastewater samples, and reclaimed water samples, ran the pipeline, and identified 19, 57, and 8 potentially bi-functional ARGs in each source, respectively. Manual inspection of the results identified three most likely bi-functional ARGs. Interestingly, one bi-functional ARG, encoding both aminoglycoside and tetracycline resistance, appeared in all three data sets, indicating its prevalence in different environments. As the amount of antibiotics keeps increasing in the environment, multi-functional ARGs might become more and more common. The pipeline will be a useful computational tool for initial screening and identification of multi-functional ARGs in metagenomic data. / Master of Science / Antibiotics are the drug to fight against the infection of bacteria. Since the first antibiotic was discovered in 1928, many antibiotic drugs have been developed. At the same time, scientists discovered many genes responsible for the resistance of antibiotic drugs. Nowadays, antibiotic resistance is a global threat. Detecting antibiotic resistance genes in the environment is the first step toward monitoring and controlling antibiotic resistance. In recent years, next-generation sequencing has been widely used to get the DNA sequence from the environment. Metagenomics analysis has been used over the years to detect and analyze ARGs. In the literature, it has been reported that a single gene could carry two parts of sequences corresponding to two different ARGs, thus conferring resistance to two different antibiotics. This fusion might have some evolutionary advantages. In this study, we developed a novel computational tool to detect multi-functional ARGs. We collected data from three sources: the treatment plant water, the hospital wastewater, and the reclaimed water, and identified 19, 57, and 8 potential bi-functional ARGs in each source, respectively. After we manually inspected the result, we found three most likely bi-functional ARGs. We also found one bi-functional ARG that appears in all three datasets. The gene is responsible for aminoglycoside and tetracycline resistance. The tool will serve as the initial screening step to detect multi-functional ARGs.

Control flow hijacking attacks such as Return Oriented Programming (ROP) and data oriented attacks like Data Oriented Programming (DOP) are problems still plaguing modern software today. While there have been many attempts at hardening software and protecting against these attacks, the heavy performance cost of running these defenses and intrusive modifications required has proven to be a barrier to adoption. In this work, we present Monguard, a high-performance hardware assisted in-process monitor protection system utilizing Intel Memory Protection Keys (MPK) to enforce execute-only memory, combined with code randomization and runtime binary patching to effectively protect and hide in-process monitors. Next, we introduce L-MVX, a flexible lightweight Multi-Variant Execution (MVX) system running in the in-process monitor system that aims to solve some of the performance problems of recent MVX defenses through selective program call graph protection and in-process monitoring, maintaining security guarantees either by breaking attacker assumptions or creating a scenario where a particular attack only works on a single variant. / Master of Science / Memory corruption attacks are still prevalent on modern software. While there have been many attempts at hardening software and preventing against these attacks, the heavy performance cost of running these defenses and intrusive modifications required have proven to be a barrier to adoption. In this work, we present L-MVX, a high-performance hardware assisted in-process monitor protection system that provides an unintrusive and efficient way to defend against these attacks on monitor systems. We also introduce L-MVX, a flexible lightweight process monitoring engine running on L-MVX that aims to solve some of the performance problems of recent monitor defenses.

With the advances in VLSI and System-On-Chip (SOC) technologies, the complexity of hardware systems has increased manifold. The increasing complexity poses serious challenges to the digital hardware design. Functional verification has become one of the most expensive and time-consuming components of the current product development cycle. Today, design verification alone often surpasses 70% of the total development cost and the situation has been projected to continue to worsen. The two most widely used formal methods for design verification are Equivalence Checking and Model Checking. During the design phase, hardware goes through several stages of optimizations for area, speed, power, etc. Determining the functional correctness of the design after each optimization step by means of exhaustive simulation can be prohibitively expensive. An alternative to prove functional correctness of the optimized design is to determine the design's functional equivalence with respect to some golden model which is known to be functionally correct. Efficient techniques to perform this process is known as Equivalence Checking. Equivalence Checking requires that the implementation circuit should be functionally equivalent to the specification circuit. Complexities in Equivalence Checking can be exponential to the circuit size in the worst case. Since Equivalence Checking of sequential circuits still remains a challenging problem, in this thesis, we first address this problem using efficient learning techniques. In contrast to the traditional learning methods, our method employs a mining algorithm to discover global constraints among several nodes efficiently in a sequential circuit. In a Boolean satisfiability (SAT) based framework for the bounded sequential equivalence checking, by taking advantage of the repeated search space, our mining algorithm is only performed on a small window size of unrolled circuit, and the mined relations could be reused subsequently. These powerful relations, when added as new constraint clauses to the original formula, help to significantly increase the deductive power for the SAT engine, thereby pruning a larger portion of the search space. Likewise, the memory required and time taken to solve these problems are alleviated. We also propose a pseudo-functional test generation method based on effective functional constraints extraction. We use mining techniques to extract a set of multi-node functional constraints which consists of illegal states and internal signal correlation. Then the functional constraints are imposed to a ATPG tool to generate pseudo functional delay tests. / Master of Science

Determining the optimum computer architecture configuration for a specific application or a generic algorithm is a difficult task. The complexity involved in today's computer architectures and systems makes it more difficult and expensive to easily and economically implement and test full functional prototypes of computer architectures. High level VHDL performance modeling of architectures is an efficient way to rapidly prototype and evaluate computer architectures. Determining the architecture configuration is fixed, one would like to know the tolerance and expected performance of individual/critical components and also what would be the best way to map the software tasks onto the processor(s). Trade-offs and engineering compromises can be analyzed and the effects of certain component failures and communication bottle-necks can be studied. A part of the research work done for the RASSP (Rapid Prototyping of Application Specific Signal Processors) project funded by Department of Defense contracts is documented in this thesis. The architectures modeled include a single-processor, single-global-bus system; a four processor, single-global-bus system; a four processor, multiple-local-bus, single-global-bus system; and finally, a four processor multiple-local-bus system interconnected by a crossbar interconnection switch. The hardware models used are mostly legacy/inherited models from an earlier project and they were upgraded, modified and customized to suit the current research needs and requirements. The software tasks that are run on the processors are pieces of the signal and image processing algorithm run on the Synthetic Aperture Radar (SAR). The communication between components/devices is achieved in the form of tokens which are record structures. The output is a trace file which tracks the passage of the tokens through various components of the architecture. The output trace file is post-processed to obtain activity plots and latency plots for individual components of the architecture. / Master of Science

The Pedestrian is compromised in the majority of our built landscapes. Today's dominant fixture is the automobile. Pedestrian and automobile efficiency are in direct competition with each other; to facilitate one is to inhibit the other. Pedestrian functionality depends on the presence of walkable destinations, commonly referred to as multi-use areas. Pedestrian functionality is an important issue because sprawl, the current development norm, is reaching the physical limits of the countryside. Density is the positive alternative to issues we encounter as a result of low density such as increased runoff, pollution, congestion, obesity, physical inactivity, and road rage. â The alternative to sprawl is simple and timely: neighborhoods of housing, parks and schools placed within walking distance of shops, civic services, jobs and transit — a modern version of the traditional town.â 1 Improving pedestrian functionality has the ability to impact multiple aspects of our lives and improve the quality of life we experience. â We need communities that are occupied full time and that provide a world of opportunity for kids, communities that support women and men in their efforts to weave together an ever more complex life of home and work.â 2 1 Calthorpe, Peter, p. 16 2 Duany, Andres, p. 25 / Master of Landscape Architecture

This project aims to design a safe and healthy space for orphan girls in Iraq, considering their needs and culture. Moreover, to set a foundation for girls to grow and become confident young individuals. My approach to this project was working both in plan and perspective. From the first days of the project, I started drawing the qualities that I was looking for in the design in perspective. Moreover, this is an extensive project, on a 1400 square meter site, so one of the important aspects of the project was to have a language through the design that makes the project coherent. In this book final renders are presented along with the initial ideas and sketches. Iraq is chosen because "there are 11,000 children addicted to drugs in Baghdad, that many girls aged 12 to 16 years old have been victims of abuse, and that many girls aged 12 years and above have endured harassment." This project shows that a well-thought design can improve the lives of orphaned girls, and hopefully, the outcome will raise awareness for the education and well-being of orphaned girls in Iraq. / Master of Architecture / Life is not easy, even when you live in a healthy family. Now, imagine what it looks like when you are traumatized as a kid. Kids who lost their parents in the war or are traumatized by their own family have a blurry glass on their eyes; they are confused about their feelings and experiences and often have difficulties trusting others and making meaningful connections. Moreover, orphan kids who had observed severe scenes may have panic attacks. Traumatized kids have very specific needs that the architectural design of their environment should address.

Mémoire numérisé par la Direction des bibliothèques de l'Université de Montréal.