This thesis describes the development and applications of sub-micron current-perpendicular-to plane devices fabricated by three-dimensional etching with a focused ion beam microscope. This technique was applied to a range of materials, including the study of c-axis Josephson junctions in the high temperature superconductor Tl2Ba2CaCu2O8, the fabrication of superconducting quantum interference devices with sub-micron loop areas, and GaN light emitting diodes. The main body of research was carried out in the study of Nb based Josephson junctions working at a temperature of 4.2 K. Junctions with normal metal, insulating and ferromagnetic barriers were characterised, as well as the first metallic antiferromagnetic Josephson junctions using γ-Fe50Mn50 as the barrier. 'Pseudo-spin-valve' Josephson junctions were also created using aCo/Cu/Fe20Ni80 barrier. In this case the relative orientation of the magnetic moments of the Co and Fe20Ni80 could be changed with an applied magnetic field. The magnetoresistance and critical current of the device showed a strong correlation, implying a direct influence of the magnetic structure of the device on the critical current.

It is widely recognized that device and interconnect fabrics at the nanoscale will be characterized by a higher density of permanent defects and increased susceptibility to transient faults. This appears to be intrinsic to nanoscale regimes and fundamentally limits the eventual benefits of the increased device density, i.e., the overheads associated with achieving fault-tolerance may counter the benefits of increased device density -- density-reliability tradeoff. At the same time, as devices scale down one can expect a higher proportion of area to be associated with interconnection, i.e., area is wire dominated. In this work we theoretically explore density-reliability tradeoffs in wire dominated integrated systems. We derive an area scaling model based on simple assumptions capturing the salient features of hierarchical design for high performance systems, along with first order assumptions on reliability, wire area, and wire length across hierarchical levels. We then evaluate overheads associated with using basic fault-tolerance techniques at different levels of the design hierarchy. This, albeit simplified model, allows us to tackle several interesting theoretical questions: (1) When does it make sense to use smaller less reliable devices? (2) At what scale of the design hierarchy should fault tolerance be applied in high performance integrated systems? In the second part of this thesis we explore perturbation-based computational models as a promising choice for implementing next generation ubiquitous information technology on unreliable nanotechnologies. We show the inherent robustness of such computational models to high defect densities and performance uncertainty which, when combined with low manufacturing precision requirements, makes them particularly suitable for emerging nanoelectronics. We propose a hybrid eNano-CMOS perturbation-based computing platform relying on a new style of configurability that exploits the computational model's unique form of unstructured redundancy. We consider the practicality and scalability of perturbation-based computational models by developing and assessing initial foundations for engineering such systems. Specifically, new design and decomposition principles exploiting task specific contextual and temporal scales are proposed and shown to substantially reduce complexity for several benchmark tasks. Our results provide strong evidence for the relevance and potential of this class of computational models when targeted at emerging unreliable nanoelectronics. / text

Oxide heterostructures are attracting huge interest in recent years due to the special functionalities of quasi two-dimensional quantum gases. In this thesis, the electronic states at the interface between perovskite oxides and pyrite compounds have been studied by first-principles calculations based on density functional theory. Optimization of the atomic positions are taken into account, which is considered very important at interfaces, as observed in the case of LaAlO3/SrTiO3. The creation of metallic states at the interfaces thus is explained in terms of charge transfer between the transition metal and oxygen atoms near the interface. It is observed that with typical thicknesses of at least 10-12 °A the gases still extend considerably in the third dimension, which essentially determines the magnitude of quantum mechanical effects. To overcome this problem, we propose incorporation of highly electronegative cations (such as Ag) in the oxides. A fundamental interest is also the thermodynamic stability of the interfaces due to the possibility of atomic intermixing in the interface region. Therefore, different cation intermixed configurations are taken into account for the interfaces aiming at the energetically stable state. The effect of O vacancies is also discussed for both polar and non-polar heterostructures. The interface metallicity is enhanced for the polar system with the creation of O vacancies, while the clean interface at the non-polar heterostructure exhibits an insulating state and becomes metallic in presence of O vacancy. The O vacancy formation energies are calculated and explained in terms of the increasing electronegativity and effective volume of A the side cation. Along with these, the electronic and magnetic properties of an interface between the ferromagnetic metal CoS2 and the non-magnetic semiconductor FeS2 is investigated. We find that this contact shows a metallic character. The CoS2 stays quasi half metallic at the interface, while the FeS2 becomes metallic. At the interface, ferromagnetic ordering is found to be energetically favorable as compared to antiferromagnetic ordering. Furthermore, tensile strain is shown to strongly enhance the spin polarization so that a virtually half-metallic interface can be achieved, for comparably moderate strain. Our detailed study is aimed at complementing experiments on various oxide interfaces and obtaining a general picture how factors like cations, anions, their atomic weights and elecronegativities, O vacancies, lattice mismatch, lattice relaxation, magnetism etc play a combined role in device design.

In the Kane silicon-based electron-mediated nuclear spin quantum computer architecture, phosphorus is doped at precise positions in a silicon lattice, and the P donor nuclear spins act as qubits. Logical operations on the nuclear spins are performed using externally applied magnetic and electric fields. There are two important interactions: the hyperfine and exchange interactions, crucial for logical qubit operations. Single qubit operations are performed by applying radio frequency magnetic fields resonant with targeted nuclear spin transition frequencies, tuned by the gate-controlled hyperfine interaction. Two qubit operations are mediated through the exchange interaction between adjacent donor electrons. It is important to examine how these two interactions vary as functions of experimental parameters. Here we provide such an investigation. First, we examine the effects of varying several experimental parameters: gate voltage, magnetic field strength, inter donor separation, donor depth below the silicon oxide interface and back gate depth, to explore how these variables affect the donor electron density. Second, we calculate the hyperfine interaction and the exchange coupling as a function of these parameters. These calculations were performed using various levels of effective mass theory. In the first part of this thesis we use a multi-valley effective mass approach where we incorporate the full Si crystal Bloch structure in calculating the donor electron energy in the bulk silicon. Including the detailed Bloch structure is very computationally intensive, thus when we considered the effect of the externally applied fields in the second and third part, we employ an approach where we focus on the smooth donor-modulated envelope function to determine the response of the donor electron to the applied electric and magnetic fields and qubit position in the lattice. The electric field potential was obtained using Technology Computer Aided Design software, and the interfaces were modelled as a barrier using a step function. One of the critical results of this theoretical study was finding that there exist two regimes for the behaviour of the donor electron in response to the applied gate voltage, dependent on donor distance from the gate. When the qubit is in close proximity to the gate the electron transfer to the gate is gradual. However if the qubit is located far enough from the gate, we found that the donor electron is ionised toward the gate for gate voltages above a certain threshold. Another significant development we have made is in our calculations of the exchange coupling between two adjacent donor electrons. We extended our original Heitler-London basis to describe the two-electron system, and adopted a molecular orbital method where we included a a basis of 78 singlet and 66 triplet two-electron states. In addition to calculating a more accurate exchange coupling, we also evaluated the energy spectrum of the two electron double donor system. We aim to provide relevant information for the experimental design of these devices and highlight the significance of environmental factors other than gate potential that affect the donor electron.

No description available.

Silicon Nanowire (SiNW) based reconfigurable fieldeffect transistors (RFETs) provide an additional gate terminal called the program gate which gives the freedom of programming p-type or n-type functionality for the same device at runtime. This enables the circuit designers to pack more functionality per computational unit. This saves processing costs as only one device type is required, and no doping and associated lithography steps are needed for this technology. In this paper, we present a complete design flow including both logic and physical synthesis for circuits based on SiNW RFETs. We propose layouts of logic gates, Liberty and LEF (Library Exchange Format) files to enable further research in the domain of these novel, functionally enhanced transistors. We show that in the first of its kind comparison, for these fully symmetrical reconfigurable transistors, the area after placement and routing for SiNW based circuits is 17% more than that of CMOS for MCNC benchmarks. Further, we discuss areas of improvement for obtaining better area results from the SiNW based RFETs from a fabrication and technology point of view. The future use of self-aligned techniques to structure two independent gates within a smaller pitch holds the promise of substantial area reduction.

The use of ferroelectric negative capacitance (NC) has been proposed as a promising way to reduce the power dissipation in nanoscale devices [1]. According to single-domain (SD) Landau theory, a hysteresis-free NC state in a ferroelectric might be stabilized in the presence of depolarization fields below a certain critical film thickness tF, SD. However, it is well-known that depolarization fields will cause the formation of domains in ferroelectrics to reduce the depolarization energy [2], which is rarely considered in the literature on NC [3]. The improvident use of SD Landau theory to model NC devices seems to be the main reason for the large discrepancy between experimental data and the current theory [4]. Here, we will show by simulation how anti-parallel domain formation can strongly limit the stability of the NC state in a metal-ferroelectric-insulator-metal (MFIM) structure, which is schematically shown in Fig. 1.

<p>With the Moore’s Law era coming to an end, much attention has been given to novel nanoelectronic devices as a key driving force behind technological innovation. Utilizing the inherent device physics of nanoelectronic components, for sensory and computational tasks have proven to be useful in reducing the area and energy requirements of the underlying hardware fabrics. In this work we demonstrate how the intrinsic noise present in nano magnetic devices can pave the pathway for energy efficient neuromorphic hardware. Furthermore, we illustrate how the unique magnetic properties of such devices can be leveraged for accurate estimation of environmental magnetic fields. We focus on spintronic technologies in particular, due to the low current and energy requirements in contrast to traditional CMOS technologies.</p><p>Image segmentation is a crucial pre-processing stage used in many object identification tasks that involves simplifying the representation of an image so it can be conveniently analyzed in the later stages of a problem. This is achieved through partitioning a complicated image into specific groups based on color, intensity or texture of the pixels of that image. Locally Excitatory Globally Inhibitory Oscillator Network or LEGION is one such segmentation algorithm, where synchronization and desynchronization between coupled oscillators are used for segmenting an image. In this work we present an energy efficient and scalable hardware implementation of LEGION using stochastic Magnetic Tunnel Junctions that leverage the fast parallel</p><p> nature of the algorithm. We demonstrate that the proposed hardware is capable of segmenting binary and gray-scale images with multiple objects more efficiently than<br> existing hardware implementations. </p><p>It is understood that the underlying device physics of spin devices can be used for emulating the functionality of a spiking neuron. Stochastic spiking neural networks based on nanoelectronic spin devices can be a possible pathway of achieving brain-like compact and energy-efficient cognitive intelligence. Current computational models attempt to exploit the intrinsic device stochasticity of nanoelectronic synaptic or neural components to perform learning and inference. However, there has been limited analysis on the scaling effect of stochastic spin devices and its impact on the operation of such stochastic networks at the system level. Our work attempts to explore the design space and analyze the performance of nanomagnet based stochastic neuromorphic computing architectures, for magnets with different barrier heights. We illustrate how the underlying network architecture must be modified to account for the random telegraphic switching behavior displayed by magnets as they are scaled into the superparamagnetic regime.<br></p><p>Next we investigate how the magnetic properties of spin devices can be utilized for real world sensory applications. Magnetic Tunnel Junctions can efficiently translate variations in external magnetic fields into variations in electrical resistance. We couple this property of Magnetic Tunnel Junctions with Amperes law to design a non-invasive sensor to measure the current flowing through a wire. We demonstrate how undesirable effects of thermal noise and process variations can be suppressed through novel analog and digital signal conditioning techniques to obtain reliable and accurate current measurements. Our results substantiate that the proposed noninvasive current sensor surpass other state-of-the-art technologies in terms of noise and accuracy.<br></p><br>