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Pages 42, 63, 69, 71-72, 77, 87, 90, 93-94, and 97 had titles that were cut off in the scanning process. The administrator uploading this file re-wrote them on the bottom of each page. / <p>This thesis presents the results of an investigation of an alternative technique for the realization of narrow band-pass filters. This technique uses N parallel connected RC time-varying networks. A comparison of the performance of the 3-channel sampled data filter and one using the technique of quadrature modulation is made with respect to overall system performance.</p> <p>Excellent agreement between the theoretical and experimental results are obtained for the band-pass characteristics. Design criteria are also presented in order to approach the ideal operation of an N-path sampled data filter.</p> / Thesis / Master of Engineering (ME)

This thesis reports on an implementation of an action-based model for concurrent programming. Concurrency is expressed by allowing objects to have actions with a guard and a body. Each action has its own execution context, and concurrent execution is realized when program execution is happening in more than one context at a time. Two actions of different objects can run concurrently, and they are synchronized whenever a shared object is accessed simultaneously by both actions. The appeal of this model is that it allows a conceptually simple framework for designing and analyzing concurrent programs. To experiment with action-based concurrency, we present a small language, ABC Pascal, which is an experimental attempt as a proof of feasibility of such a model, and also meant to help identify issues for achieving reasonable efficiency in implementation. It extends a subset of Pascal that supports basic sequential programming constructs, and provides action-based concurrency as the action-based model prescribes. This work deals with the specification and implementation of ABC Pascal. The one-pass compiler directly generates assembly code, without devoting efforts to optimization. While the code is not optimized, the results that ABC Pascal has achieved in performance testing are so far comparable to mainstream concurrent programming languages. / Thesis / Master of Science (MSc)

<p> Due to the high cost, telephone and cable television companies can only justify installing fiber optical networks to remote sites which serve up to a few hundred customers. For customers located at variable distances from the transmitting station, they will receive signals at different strengths. The signal stability and system reliability of FTTH network affected largely by the distance. We propose an effective solution for the enhancement of signal stability of FTTH network, which uses a semiconductor optical amplifier (SOA) coupled with an optical receiver.</p> <p> Before the signal reaches the optical receiver at the user end, signal strength is automatically adjusted through a semiconductor optical amplifier (SOA). Due to the special saturation property of SOA, the output optical signal will have very small fluctuation regardless the input optical signal power, the signal stability of FTTH network will be improved significantly. A set of simplified governing equations of SOA has been proposed and the corresponding numerical solver has been implemented. Although the main focus is primarily the SOA, a simplified optical receiver is also simulated, which comprises a PIN photodetector and a low pass filter (LPF). All simulations have been carried out in the time-domain with the frequency domain low pass filter modeled by a digital filter.</p> / Thesis / Master of Applied Science (MASc)

Yes / Reverse osmosis (RO) has become a common method for treating wastewater and removing several harmful organic compounds because of its relative ease of use and reduced costs. Chlorophenol is a toxic compound for humans and can readily be found in the wastewater of a wide range of industries. Previous research in this area of work has already provided promising results in respect of the performance of an individual spiral wound RO process for removing chlorophenol from wastewater, but the associated removal rates have stayed stubbornly low. The literature has so far confirmed that the efficiency of eliminating chlorophenol from wastewater using a pilot-scale of an individual spiral wound RO process is around 83 %, compared to 97 % for dimethylphenol. This paper explores the potential of an alternative configuration of two-stage/two-pass RO process for improving such low chlorophenol rejection rates via simulation and optimisation. The operational optimisation carried out is enhanced by constraining the total recovery rate to a realistic value by varying the system operating parameters according to the allowable limits of the process. The results indicate that the proposed configuration has the potential to increase the rejection of chlorophenol by 12.4 % while achieving 40 % total water recovery at an energy consumption of 1.949 kWh/m³.

Yes / Fault tolerance is the ability of a system to respond swiftly to an unexpected failure. Failures in a cloud computing environment are normal rather than exceptional, but fault detection and system recovery in a real time cloud system is a crucial issue. To deal with this problem and to minimize the risk of failure, an optimal fault tolerance mechanism was introduced where fault tolerance was achieved using the combination of the Cloud Master, Compute nodes, Cloud load balancer, Selection mechanism and Cloud Fault handler. In this paper, we proposed an optimized fault tolerance approach where a model is designed to tolerate faults based on the reliability of each compute node (virtual machine) and can be replaced if the performance is not optimal. Preliminary test of our algorithm indicates that the rate of increase in pass rate exceeds the decrease in failure rate and it also considers forward and backward recovery using diverse software tools. Our results obtained are demonstrated through experimental validation thereby laying a foundation for a fully fault tolerant IaaS Cloud environment, which suggests a good performance of our model compared to current existing approaches. / Petroleum Technology Development Fund (PTDF)

A warfighter's situation awareness is vital to their survival and lethality on the battlefield. Situation awareness, achieved through audition, allows the warfighter to quickly and accurately locate the position of fellow warfighters and potential threats. However, hearing loss, acoustic trauma, or the use of hearing protection can diminish this vital ability to locate sounds in the environment accurately. The introduction of electronically modulated hearing protection and enhancement devices (HPED) is an attempt to improve auditory situation awareness for the warfighter. Currently, however, there are no auditory fitness-for-duty measures that allow an warfighter, commander, or medical personnel to assess localization performance in the open-ear or with hearing protection. Such an assessment is important for pre-placement of a warfighter into a hearing critical job and also as a readiness metric prior-to and during a deployment. The ability to measure performance with a hearing protector will also assist warfighters in selecting protection that will afford maximum performance. This study examined a set of auditory fitness for duty (AFFD) test/stimulus combinations designed to quantify horizontal localization performance. Three listening conditions were used throughout the study; they included an open-ear condition as well as in-the- ear HPED and over-the-ear HPED. The Peltor Com-Tac IITM was used as the over-the- ear HPED and the Etymotic EB15 BlastPLGTM was used as the in-the-ear HPED. Stimuli consisted of filtered pink-noise that differed in both duration and frequency. Frequencies ranged from 500-1000 Hz (low) and 3000-6000 Hz (high) and durations included 300 ms (short) and 3 seconds (long). Stimuli were presented at 60 and 70 dB SPL. AFFD measures were specifically designed to measure current performance or to predict performance after training. Measures of current performance include an accuracy test measured in four quadrants (Left-Front, Right-Front, Left-Rear, and Right- Rear) and a front-back confusion test (FBCT). Accuracy within each quadrant was reduced to a mean absolute error, in degrees, for stimuli presented at 30 deg and 60 deg from the medial plane. FBCT consisted of a percent correct for stimuli presented at 0 deg and 180deg. Measures of post-training performance include an inter-aural cues test and a front-back difference test FBDT. The IACT and FBDT required participants to identify if two sequential stimuli were presented from the same or different locations. The IACT was tested in the left-front and right-front quadrants (for stimuli at 30 deg and 60 deg) and the FBCT was tested with stimuli at 0 deg and 180 deg These tests also provided a percent. Results show that the high-frequency long-duration (H-Long) stimuli predicted current localization performance well, for all listening conditions. Other AFFD test/stimulus combinations were also found to predict performance for a given listening condition, but not for all conditions. AFFD measures designed to predict post-training performance did not show any AFFD test/stimuli combinations that worked for all listening conditions. There were some combinations that worked for a given listening condition but not all conditions. A further analysis of the data showed that the limited number and types of HPEDs used may have confounded these results. Passive hearing protectors as well as HPEDs are known to disturb the spectral and temporal auditory cues that allow for accurate localization. While these cues are disturbed they are often still present in the signal heard by the listener. With training/use of a hearing protector, auditory learning may occur that allows these cues to be used again to accurately locate a sound source. Auditory learning was assessed by providing HPED training/use to novice hearing protection users. Pre and post-training testing was performed with the open-ear, in-the-ear HPED, and over-the-ear HPED. Training was provided for only one type of HPED. Results indicate that auditory learning occurred for the training HPED only. There was no crossover of auditory learning to the non-training protector. Other measures of auditory learning included a subjective confidence rating of the HPED and a measure of response time for the localization task. Results showed that confidence increased for the HPED that was used in training. However, no changes in response time were found for any listening condition. Based on the results of this study, it is recommended that AFFD measures continue to be developed for implementation as pre-placement, HPED selection, return-to-duty, and readiness metrics for U.S. military personnel. It is also recommended that objective and subjective measures of hearing protection performance consider the effect of auditory learning. The rating or ranking of HPEDs by novice users of such a device, without adequate training/use to allow for auditory learning, should be weighed carefully. / Ph. D.

Among PWM power conversion topologies, the single-switch forward topology is the one that has been most widely used for decades. Its popularity has been based on many factors, including its low cost, circuit simplicity and high efficiency. However, several issues need to be addressed when using the forward converter such as the core reset, the voltage spikes caused by the transformer leakage inductance, and the pulsating input current waveform. The transformer is driven in a unidirectional fashion in the forward converter; a tertiary forward converter (TFC) is an example of this. Therefore, the third winding and reset diode must be provided with an adequate period of reset time so that the flux can be fully reset by the end of each switching cycle to prevent core saturation. Also, due to the utilization of a transformer, leakage inductances cannot be avoided. The energy stored in the leakage inductance during current ramp-up is not transferred to the load, and is not recovered during its discharge phase. As a result, the VDS waveform has a voltage spike and undesirable high-frequency oscillation. Therefore, a higher voltage-rating switch should be used to reduce the risk of high-voltage breakdown. Although a switch with amply high voltage ratings is available, it would tend to have a higher on-resistance, RDS(ON), resulting in increased conduction losses. Moreover, selection of a switch with higher voltage ratings than necessary may needlessly increase the cost of the design. Usually an additional circuit such as a snubber circuit or a clamp circuit or the soft-switching technique is used to absorb these voltage spikes. Consequently, the leakage inductance is intentionally minimized in the PWM power conversion technique so that it will not degrade the circuit performance. In contrast, the leakage inductance of the transformer may enhance rather than detract from circuit performance with a resonant power conversion technique. To date, however, no single-switch forward converter has been claimed to be able to enhance the converter performance with the PWM power conversion technique by utilizing the leakage inductance. Therefore, research on the utilization of the transformer leakage inductance in the PWM forward converter is needed. Two techniques, input current ripple reduction and an embedded filter, are proposed to enhance the performance of forward converter using the PWM technique. By inserting a capacitor between two primary windings of the TFC, an input current ripple reduction technique is proposed and a forward converter with ripple reduction (FRR) is presented in this research work. Because the voltage of the capacitor is clamped to input voltage, the capacitor becomes a second voltage source to share part of the load current. As a result, the input current ripple is reduced. Moreover, the capacitor voltage is clamped both at the static and dynamic states; thus the excessive voltage stress on the main switch S1 of the FAC during low-line to high-line step transient is eliminated. Furthermore, without an external LC filter, the EMI noise levels can be further reduced as a result of the embedded notch filter formed by the transformer leakage inductance and clamp capacitor if the notch frequency is designed to be the same as the switching frequency. With the help of the clamp capacitor, therefore, the leakage inductance can enhance rather than detract from the converter performance. The input current ripple can be reduced further by employing the proposed techniques. Two sets of the clamp capacitors and the leakage inductances are utilized, and the current ripple can even be cancelled if the condition is met. Consequently, the input current becomes a non-pulsating waveform and a forward converter with ripple cancellation (FRC) is presented. Moreover, without an external LC filter, the EMI noise levels can be further attenuated as a result of the embedded low-pass filter formed by the transformer leakage inductances and clamp capacitors. Again, the leakage inductance can enhance the converter performance just as the resonant converter does. In addition to providing the analysis and design procedure, this work verifies the performance of the presented converters, the FRR and the FRC, by the experimental results. By employing the proposed techniques, eight new topologies have been extended for different power conversion applications. Each member of the FRR and the FRC families is able to enhance the converter performance, in ways such as the elimination of the voltage spikes on the main switch without a snubber circuit and the improvement of the EMI performance with small filter components. Consequently, the cost can be reduced and the space of the converter can be saved. / Ph. D.

As transistor sizes scale down and levels of integration increase, leakage power has become a critical problem in modern low-power microprocessors. This is especially true for ultra-low-voltage (ULV) circuits, where high levels of leakage force designers to chose relatively high threshold voltages, which limits performance. In this thesis, an industry-standard technique known as power-gating is explored, whereby transistors are used to disconnect the power from idle portions of a chip. Present power-gating implementations suffer from limitations including non-zero off-state leakage, which can aggregate to a large amount of wasted energy during long idle periods, and high energy overhead, which limits its use to long-term system-wide sleep modes. As this thesis will show however, by vastly increasing the effectiveness of power-gating through the use of emerging technologies, and by implementing aggressive hardware-oriented power-gating policies, leakage in microprocessors can be eliminated to a large extent. This allows the threshold voltage to be lowered, leading to ULV microprocessors with both low switching energy and high performance. The first emerging technology investigated is the Nanoelectromechnical-Systems (NEMS) switch, which is a CMOS-compatible mechanical relay with near-infinite off-resistance and low on-resistance. When used for power-gating, this switch completely eliminates off-state leakage, yet is compact enough to be contained on die. This has tremendous benefits for applications with long sleep times. For example, a NEMS-power-gated architecture performing an FFT per hour consumes 30 times less power than a transistor-power-gated architecture. Additionally, the low on-resistance can lower power-gating area overhead by 36-83\%. The second technology targets the high energy overhead associated with powering a circuit on and off. This thesis demonstrates that a new logic style specifically designed for ULV operation, Sense Amplifier Pass Transistor Logic (SAPTL), requires power-gates that are 8-10 times smaller, and consumes up to 15 times less boot-up energy, compared to static-CMOS. These abilities enable effective power-gating of an SAPTL circuit, even for very short idle periods. Microprocessor simulations demonstrate that a fine-grained power-gating policy, along with this drastically lower overhead, can result in up to a 44\% drop in energy. Encompassing these investigations is an energy estimation framework built around a cycle-accurate microprocessor simulator, which allows a wide range of circuit and power-gating parameters to be optimized. This framework implements two hardware-based power-gating schedulers that are completely invisible to the OS, and have extremely low hardware overhead, allowing for a large number of power-gated regions. All together, this thesis represents the most complete and forward-looking study on power-gating in the ULV region. The results demonstrate that aggressive power-gating allows designers to leverage the very low switching energy of ULV operation, while achieving performance levels that can greatly expand the capabilities of energy-constrained systems. / Ph. D.

Contemporary wireless systems have advanced toward smart and multifunctional radios such as software-defined or cognitive radios which access a wideband or multiband spectrum dynamically. It is desirable for the wireless systems to have high frequency selectivity early in the receiver chain at RF to relax the dynamic range requirements of subsequent stages. However, integration of high selectivity RF band-pass filters (BPF), or band-stop filters (BSF) is challenging because of limited quality factor (Q) of passive components in integrated circuit (IC) technology [1]. This proposed research achieves the followings: 1. Developing, and demonstrating innovative integrated band-pass filter that relaxes the performance tradeoffs in conventional LC filters to maximally increase filter reconfigurability in frequency tuning range (2-18 GHz), selectivity (Q=5~100) with superior dynamic range (DR>100 dB) at RF to microwave frequency range [2]. 2. Implementing active notch filter system comprised of a Q-enhancement band-pass filter (BPF) and an all-pass amplifier. The notch response is synthesized by subtracting the BPF output from the all-pass output. In the proposed synthetic notch filters, the BPF is responsible for defining selectivity while stop-band attenuation is primarily dependent on the gain matching between the BPF and all-pass amplifier. Therefore, notch attenuation is controllable independently from the bandwidth tuning, providing more operational flexibility. Further, the filter dynamic range is optimized in the all-pass amplifier independently from the selectivity control in the BPF, resolving entrenched tradeoff between selectivity and dynamic range in active filters [3]. 3. Demonstrating the mode reconfigurable LC filter that works in either BPF or BSF for a flexible blocker filtering adaptive to the dynamic blocker environments. 4. Implementing a novel feedback-based interference rejection system to improving the linearity of the BPF for high Q cases, in which the BPF Q is set to a specific value and further increase in Q is achieved using feedback gain. And finally, the second LC tank is added to increase the out of band rejection in band-pass characteristics. / Ph. D.