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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
21

Simulating Statistical Power Curves with the Bootstrap and Robust Estimation

Herrington, Richard S. 08 1900 (has links)
Power and effect size analysis are important methods in the psychological sciences. It is well known that classical statistical tests are not robust with respect to power and type II error. However, relatively little attention has been paid in the psychological literature to the effect that non-normality and outliers have on the power of a given statistical test (Wilcox, 1998). Robust measures of location exist that provide much more powerful tests of statistical hypotheses, but their usefulness in power estimation for sample size selection, with real data, is largely unknown. Furthermore, practical approaches to power planning (Cohen, 1988) usually focus on normal theory settings and in general do not make available nonparametric approaches to power and effect size estimation. Beran (1986) proved that it is possible to nonparametrically estimate power for a given statistical test using bootstrap methods (Efron, 1993). However, this method is not widely known or utilized in data analysis settings. This research study examined the practical importance of combining robust measures of location with nonparametric power analysis. Simulation and analysis of real world data sets are used. The present study found that: 1) bootstrap confidence intervals using Mestimators gave shorter confidence intervals than the normal theory counterpart whenever the data had heavy tailed distributions; 2) bootstrap empirical power is higher for Mestimators than the normal theory counterpart when the data had heavy tailed distributions; 3) the smoothed bootstrap controls type I error rate (less than 6%) under the null hypothesis for small sample sizes; and 4) Robust effect sizes can be used in conjuction with Cohen's (1988) power tables to get more realistic sample sizes given that the data distribution has heavy tails.
22

Διαφορική ανάλυση ισχύος μιας DES υλοποίησης σε FPGA

Πρίφτης, Αθανάσιος 03 March 2009 (has links)
Από τότε που ολοένα και περισσότερα εμπιστευτικά δεδομένα ανταλλάσσονται με ηλεκτρονικό τρόπο η ανάγκη για προστασία των δεδομένων αυτών γίνεται ολοένα και μεγαλύτερη. Στις πραγματικές εφαρμογές όπου χρησιμοποιούνται συστήματα κρυπτογραφίας παρατηρούνται νέες τεχνικές επίθεσης πέρα από αυτές που στηρίζονται στην μαθηματική ανάλυση. Εφαρμογές τόσο σε υλικό όσο και σε λογισμικό, παρουσιάζουν ένα αχανές πεδίο από επιθέσεις. Οι Side-Channel-Attacks εκμεταλλεύονται πληροφορίες που διαρρέουν από μια συσκευή κρυπτογράφησης. Μάλιστα από την μέρα που εμφανίστηκε μία συγκεκριμένη μέθοδος επίθεσης, προσελκύει ολοένα και μεγαλύτερο ενδιαφέρον. Πρόκειται για την Διαφορική Ανάλυση Ισχύος (Differential Power Analysis (DPA)) που πρωτοπαρουσιάστηκε από την Cryptography Research. Η DPA χρησιμοποιεί την πληροφορία που διαρρέει από μια συσκευή κρυπτογράφησης, και πρόκειται για την κατανάλωση ισχύος. Μία λιγότερο δυνατή παραλλαγή της DPA είναι η Simple Power Analysis (SPA), που παρουσιάστηκε επίσης από την Cryptography Research. Βασικός στόχος της DPA είναι να μετρηθεί με ακρίβεια η κατανάλωση ισχύος του συστήματος. Έπειτα απαιτείται η γνώση του αλγόριθμου που εκτελείται από την συσκευή, ενώ τέλος απαραίτητο είναι ένα σύνολο από γνωστά κρυπτογραφήματα ή αυθεντικά μηνύματα. Η στρατηγική της επίθεσης απαιτεί την μέτρηση πολλών δειγμάτων και στην συνέχεια την διαίρεσή τους σε δύο ή περισσότερα σύνολα με βάση ενός κανόνα . Εν συνεχεία στατιστικές μέθοδοι χρησιμοποιούνται για την επιβεβαίωση του κανόνα αυτού. Αν και μόνο αν ο κανόνας αυτός είναι σωστός τότε μπορούμε να παρατηρήσουμε αξιοπρόσεκτες τιμές στην στατιστική ανάλυση. Σκοπός της εργασίας αυτής είναι να καθορίσουμε με περισσότερες λεπτομέρειες την DPA, να αναπτύξουμε ένα περιβάλλον που θα πραγματοποιεί την επίθεση αυτή, σε μια υλοποίηση του DES (Data Encryption Standard) αλγόριθμου κρυπτογράφησης με την χρήση FPGA Board και να γίνει πειραματική εκτίμηση. / -
23

Exploiting On-Chip Voltage Regulators as a Countermeasure Against Power Analysis Attacks

Yu, Weize 24 May 2017 (has links)
Non-invasive side-channel attacks (SCA) are powerful attacks which can be used to obtain the secret key in a cryptographic circuit in feasible time without the need for expensive measurement equipment. Power analysis attacks (PAA) are a type of SCA that exploit the correlation between the leaked power consumption information and processed/stored data. Differential power analysis (DPA) and leakage power analysis (LPA) attacks are two types of PAA that exploit different characteristics of the side-channel leakage profile. DPA attacks exploit the correlation between the input data and dynamic power consumption of cryptographic circuits. Alternatively, LPA attacks utilize the correlation between the input data and leakage power dissipation of cryptographic circuits. There is a growing trend to integrate voltage regulators fully on-chip in modern integrated circuits (ICs) to reduce the power noise, improve transient response time, and increase power efficiency. Therefore, when on-chip voltage regulation is utilized as a countermeasure against power analysis attacks, the overhead is low. However, a one-to-one relationship exists between the input power and load power when a conventional on-chip voltage regulator is utilized. In order to break the one-to-one relationship between the input power and load power, two methodologies can be considered: (a) selecting multi-phase on-chip voltage regulator and using pseudo-random number generator (PRNG) to scramble the activation or deactivation pattern of the multi-phase voltage regulator in the input power profile, (b) enabling random voltage/scaling on conventional on-chip voltage regulators to insert uncertainties to the load power profile. In this dissertation, on-chip voltage regulators are utilized as lightweight countermeasures against power analysis attacks. Converter-reshuffling (CoRe) technique is proposed as a countermeasure against DPA attacks by using a PRNG to scramble the input power profile. The time-delayed CoRe technique is designed to eliminate machine learning-based DPA attacks through inserting a certain time delay. The charge-withheld CoRe technique is proposed to enhance the entropy of the input power profile against DPA attacks with two PRNGs. The security-adaptive (SA) voltage converter is designed to sense LPA attacks and activate countermeasure with low overhead. Additionally, three conventional on-chip voltage regulators: low-dropout (LDO) regulator, buck converter, and switched-capacitor converter are combined with three different kinds of voltage/frequency scaling techniques: random dynamic voltage and frequency scaling (RDVFS), random dynamic voltage scaling (RDVS), and aggressive voltage and frequency scaling (AVFS), respectively, against both DPA and LPA attacks.
24

Méthodologie de conception de composants intégrés protégés contre les attaques par corrélation / A design methodology for integrated components protected from correlation attacks

Laabidi, Selma 19 January 2010 (has links)
Les circuits cryptographiques, parce qu'ils contiennent des informations confidentielles, font l'objet de manipulations frauduleuses, appelées communément attaques, de la part de personnes mal intentionnées. Plusieurs attaques ont été répertoriées et analysées. Parmi elles, les attaques DPA (Differential Power Analysis), DEMA (Differential Electromagnetic Analysis), DBA (Differential Behavior Analysis) et les attaques en probing forment la classe des attaques par corrélation et sont considérés comme les plus redoutables car elles permettent de retrouver, à moindre coût, les clefs de chiffrement des algorithmes cryptographiques. Les concepteurs de circuits sécurisés ont été donc amené à ajouter des parades, appelées contre-mesures, afin de protéger les circuits de ces attaques. Ces contremesures doivent impacter au minimum les performances et le coût du circuit. Dans cette thèse, nous nous intéressons dans un premier temps aux attaques par corrélation, le principe de ces attaques est décrit ainsi que les principales contre-mesures pour y parer. Un formalisme décrivant de manière unique ces attaques est aussi proposé. Dans un deuxième temps, nous étudions les outils d'évaluation sécuritaires qui permettent d'estimer la résistance des circuits intégrés face aux attaques par corrélation. Après un état de l'art sur les outils existants, nous décrivons notre outil basé sur une recherche de corrélations entre le modèle du concepteur et le modèle qui peut être prédit par un attaquant. L'analyse de corrélations permet de déterminer les bits les plus sensibles pour mener à bien une attaque. Cet outil est intégré dans le flot de conception permettant ainsi d'évaluer la résistance des algorithmes cryptographiques au niveau RTL (Register Transfer Level) et portes. / The cryptographic circuits, because they contain confidential information, are subject to fraudulent manipulations called attacks from malicious people. Several attacks have been identified and analyzed. Among them DPA (Differential Power Analysis), DEMA (Differential Electromagnetic Analysis), DBA (Differential Behaviour Analysis) and probing attacks form the class of correlation attacks and are considered as the most dangerous because they allow to retrieve, at lower cost, secret keys of cryptographic algorithms. Designers of secure circuits have thus added counter-measures to protect their circuits from these attacks. Counter-measures overhead got to have a minimum of impact on circuit’s cost and performances. In this thesis, we first focus on correlation attacks; the principle of these attacks is described as well as the main counter-measures to address them. A formalism describing these attacks is also proposed. Second, we study the safe evaluation tools to estimate the resistance of integrated circuits towards correlation attacks. After a state of the art on the existing tools, we describe our tool based on a search of correlations between the designer's model and the model which can be predicted by an attacker. The analysis of the correlations determines the most sensitive bits to complete an attack. This tool is integrated into the design flow to asses the strength of cryptographic algorithms at RTL (Register Transfer Level) and gate levels. An application of our flow on several models of the algorithm AES (Advanced Encryption Standard) with and without counter-measures is proposed. The obtained results have demonstrated the effectiveness of our technique.Les circuits cryptographiques, parce qu'ils contiennent des informations confidentielles, font l'objet de manipulations frauduleuses, appelées communément attaques, de la part de personnes mal intentionnées. Plusieurs attaques ont été répertoriées et analysées. Parmi elles, les attaques DPA (Differential Power Analysis), DEMA (Differential Electromagnetic Analysis), DBA (Differential Behavior Analysis) et les attaques en probing forment la classe des attaques par corrélation et sont considérés comme les plus redoutables car elles permettent de retrouver, à moindre coût, les clefs de chiffrement des algorithmes cryptographiques. Les concepteurs de circuits sécurisés ont été donc amené à ajouter des parades, appelées contre-mesures, afin de protéger les circuits de ces attaques. Ces contremesures doivent impacter au minimum les performances et le coût du circuit. Dans cette thèse, nous nous intéressons dans un premier temps aux attaques par corrélation, le principe de ces attaques est décrit ainsi que les principales contre-mesures pour y parer. Un formalisme décrivant de manière unique ces attaques est aussi proposé. Dans un deuxième temps, nous étudions les outils d'évaluation sécuritaires qui permettent d'estimer la résistance des circuits intégrés face aux attaques par corrélation. Après un état de l'art sur les outils existants, nous décrivons notre outil basé sur une recherche de corrélations entre le modèle du concepteur et le modèle qui peut être prédit par un attaquant. L'analyse de corrélations permet de déterminer les bits les plus sensibles pour mener à bien une attaque. Cet outil est intégré dans le flot de conception permettant ainsi d'évaluer la résistance des algorithmes cryptographiques au niveau RTL (Register Transfer Level) et portes.
25

Útoky na kryptografické moduly / Attacks on Cryptographic Modules

Daněček, Petr January 2008 (has links)
The conventional way of cryptanalysis is based on the cryptographic algorithms weak points examine. The attack model of conventional cryptanalysis covers mathematical description of the cryptographic algorithm used. This model is not with the relation to the physical model implementation and the real environment. Cryptographic algorithms currently used in the combination with strong cipher keys are almost unbreakable and the conventional cryptanalysis is ineffective. The new way of cryptanalysis employs the side channels. The model of cryptanalysis using side channels is enhanced with physical revelation of module performing the cryptographic operations. This dissertation thesis deals with cryptographic module description and studies influence of side channels to the security of this module.
26

Neprofilující útoky proudovou analýzou / Non-profiling power analysis attacks

Máchal, Petr January 2016 (has links)
The work is mainly concerned with the possibilities of breaking the encryption algorithm AES with using of non-template attacks. In the introduction are listed techniques of differential analysis, which are using in the present, but for the sake of completeness is there mention about simple power analysis. In the next chapters are briefly described countermeasures against power analysis and further is described the AES algorithm. Most important parts are chapters where are described attack implementation on AES-128 through correlation power analysis and mutual information analysis. These attacks exploit power traces from www pages dedicated to book Power Analysis Attacks - Revealing the Secrets of Smartcards, http://DPAbook.org and especially to power traces from DPA Contest 4.2, http://www.dpacontest.org. In conclusion is comparison of methods based on the number of power traces needed for finding the key of secret message.
27

Detecting rater effects in trend scoring

Abdalla, Widad 01 May 2019 (has links)
Trend scoring is often used in large-scale assessments to monitor for rater drift when the same constructed response items are administered in multiple test administrations. In trend scoring, a set of responses from Time A are rescored by raters at Time B. The purpose of this study is to examine the ability of trend-monitoring statistics to detect rater effects in the context of trend scoring. The present study examines the percent of exact agreement and Cohen’s kappa as interrater agreement measures, and the paired t-test and Stuart’s Q as marginal homogeneity measures. Data that contains specific rater effects is simulated under two frameworks: the generalized partial credit model and the latent-class signal detection theory model. The findings indicate that the percent of exact agreement, the paired t-test, and Stuart’s Q showed high Type I error rates under a rescore design in which half of the rescore papers have a uniform score distribution and the other half have a score distribution proportional to the population papers at Time A. All these Type I errors were reduced when using a rescore design in which all rescore papers have a score distribution proportional to the population papers at Time A. For the second rescore design, results indicate that the ability of the percent of exact agreement, Cohen’s kappa, and the paired t-test in detecting various effects varied across items, sample sizes, and type of rater effect. The only statistic that always detected every level of rater effect across items and frameworks was Stuart’s Q. Although advances have been made in the automated scoring field, the fact is that many testing programs require humans to score constructed response items. Previous research indicates that rater effects are common in constructed response scoring. In testing programs that keep trends in data across time, changes in scoring across time confound the measurement of change in student performance. Therefore, the study of methods to ensure rating consistency across time, such as trend scoring, is important and needed to ensure fairness and validity.
28

Latent Difference Score Mediation Analysis in Developmental Research: A Monte Carlo Study and Application

Simone, Melissa 01 May 2018 (has links)
Developmental and prevention researchers aim to determine how unhealthy behaviors emerge. Mediation analysis offers a statistical tool that allows researchers to describe the processes underlying early risk and later health outcomes. Among existing longitudinal mediation models, latent difference score mediation stands out due to its unique ability to capture variations in changes both within and across individuals, as well as its ability to examine non-linear change over time. However, the literature currently lacks sample size guidelines for latent difference mediation models, which has proven to make the use of these models difficult. The current project addresses this limitation by offering an empirical set of sample guidelines for a variety of latent difference mediation score models through a Monte Carlo simulation study. By offering empirical sample size guidelines for latent difference score mediation models, future developmental and prevention researchers can make informed sampling decisions prior to data collection. Moreover, women who misuse alcohol have been found to experience more severe medical consequences than men. However, minimal research has evaluated how gender specific risk factors influence its onset. The current project addresses this limitation by applying latent difference score mediation to evaluate how disordered eating behaviors among adolescent girls influence alcohol misuse among adult women.
29

Power Analysis of Continuous Data Capture in BeePi, a Solar- Powered Multi-Sensor Electronic Beehive Monitoring System for Langstroth Beehives

Shah, Keval 01 May 2017 (has links)
This thesis describes the power analysis of the electronic beehive monitoring system. The electronic beehive monitoring system was made to work either with a UB12120 12V 12Ah standard lead-acid battery or an Anker (TM) Astro E7 5V lithium-ion battery to analyze the power requirements. These batteries are recharged by Renogy 50Watt 12 Volt Monocrystalline Solar Panel. Power analysis is performed using both batteries to calculate system’s efficiency. The performed power analysis indicates that the Anker (TM) Astro E7 26800mAh 5V lithium-ion battery runs approximately 6 hours more than the lead acid battery. Moreover, the lithium-ion battery is compact, has a lighter weight, is more efficient, and has a longer cycle life. Using lithium-ion batteries will likely result in fewer hardware components and a smaller environmental footprint.
30

Méthodologie de conception de composants intégrés protégés contre les attaques par corrélation

Laabidi, Selma 19 January 2010 (has links) (PDF)
Les circuits cryptographiques, parce qu'ils contiennent des informations confidentielles, font l'objet de manipulations frauduleuses, appelées communément attaques, de la part de personnes mal intentionnées. Plusieurs attaques ont été répertoriées et analysées. Parmi elles, les attaques DPA (Differential Power Analysis), DEMA (Differential Electromagnetic Analysis), DBA (Differential Behavior Analysis) et les attaques en probing forment la classe des attaques par corrélation et sont considérés comme les plus redoutables car elles permettent de retrouver, à moindre coût, les clefs de chiffrement des algorithmes cryptographiques. Les concepteurs de circuits sécurisés ont été donc amené à ajouter des parades, appelées contre-mesures, afin de protéger les circuits de ces attaques. Ces contremesures doivent impacter au minimum les performances et le coût du circuit. Dans cette thèse, nous nous intéressons dans un premier temps aux attaques par corrélation, le principe de ces attaques est décrit ainsi que les principales contre-mesures pour y parer. Un formalisme décrivant de manière unique ces attaques est aussi proposé. Dans un deuxième temps, nous étudions les outils d'évaluation sécuritaires qui permettent d'estimer la résistance des circuits intégrés face aux attaques par corrélation. Après un état de l'art sur les outils existants, nous décrivons notre outil basé sur une recherche de corrélations entre le modèle du concepteur et le modèle qui peut être prédit par un attaquant. L'analyse de corrélations permet de déterminer les bits les plus sensibles pour mener à bien une attaque. Cet outil est intégré dans le flot de conception permettant ainsi d'évaluer la résistance des algorithmes cryptographiques au niveau RTL (Register Transfer Level) et portes.

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