This report presents a study of digital predistortion of analog amplifiers and the simulation of a digital predistorter. Predistortion can be of significant benefit in wireless transmitters. As power consumption is becoming a greater concern, digital predistortion helps maximize power efficiency of power amplifiers by allowing them to operate in their most efficient regions while not corrupting data. Many wireless standards use channels with frequency carriers in close proximity to other channels. This leads to the necessity to ensure that spectral regrowth, which adds interference to neighboring frequencies, does not occur. Digital predistortion is a promising method to achieve this. Some major aspects of a predistortion system are discussed. These include the analog or digital predistorter implementation, simulating designs with memory or memoryless power amplifiers, baseband or high frequency predistortion, and training a predistorter. / text

Development of linear modulation schemes has opened the way for spectrally efficient, high speed digital communication systems for voice and data applications. A trend has been to develop ultra wide and wide bandwidth modulation formats, which has meant feedback linearisation schemes (both analogue and digital) are no longer effective. This has in turn led to a number of approaches that involve predistorting the signal prior to amplification, with a characteristic that is the inverse to that of the power amplifier (PA). This thesis presents a polynomial based predistortion for linearisation of an RF PA. The predistortion characteristic is adaptive, using the LMS algorithm to minimise the mean squared error between output of the PA, and a scaled version of the baseband signal. This system can reduce third-order intermodulation by 40 dB when running in real time.

This master’s thesis deals with integrating simulations using Agilents Electronic Design Automation tool ADS with customized Matlab scripts, for solving complex analog and digital radio architectures. In particular, it addresses predistortion, realized in the digital domain, of power amplifiers, modeled in the analog domain. The former is implemented in Matlab while the latter is implemented in ADS. Two versions of integrating the two systems have been tested: 1) Iterative approach on sample basis and 2) Scheduled batch solution by matrix inversion. The concept has been tested on two different PA configurations: 1) a standard class-AB PA and 2) a Doherty PA architecture. Evaluation has also been done on ADS ability to correctly simulate memory effects in PAs and on the actual DPD-algorithms ability to compensate for these memory effects.  An integrated simulation environment for ADS and Matlab was successfully established within the work of this thesis. Matlab scripts, used in predistortion algorithms in the digital domain, could interact directly with component-based PA models, in an enclosed simulation system.  The simulation results show that sample basis method is the most accurate, fast and reliable method to linearize a PA. The PA1 proved to be easier than the DPA to linearize, except for when being close to saturation where better IMD-suppression was achieved with the DPA.  ADS is clearly able to simulate memory effects in the analog domain. At low gain-levels the applied compensating memory-algorithms showed a great improvement to the linearization of the output signal of the PA. At higher gain-levels though, the compensation for memory effects lost their efficiency because the non-linearity of the PA became too significant.

This thesis presents a transmitter with digital baseband predistorter to improve linearity of power amplifier. The architecture adopts the look-up table predistorter base on a polar scheme, and realizes the digital processor using FPGA. The predistortion for AM/AM and AM/PM nonlinear relations in a 0.5£gm GaAs pHEMT class-AB power amplifier has been performed. One-tone, two-tone and multi-tone continuous waves generated by baseband signal are used for linearity test. The results demonstrate that the digital predistortion technique can effectively improve intermodulation distortion. With this technique, the power amplifier can operate in the higher power range to achieve a similar linearity and a higher efficiency.

This thesis utilizes the digital predistortion technique to improve the linearity of high power amplifiers for WiMAX basestation applications. The power amplifier with the proposed technique can achieve higher output power and efficiency than with the conventional output power backoff technique. Owing to a very high PAPR value of the OFDM modulation signals applied to WiMAX basestation, the linearity requirement for the basestation power amplifiers is very strict. This thesis adopts a look-up table predistorter based on a polar scheme and realizes the digital predistorter circuitry using FPGA. As a result, the implemented digital predistorter successfully enhances the linearity of a 15W Lateral MOSFET Class-AB power amplifier operating in 2.6 GHz WiMAX band. Under the conditions that satisfy the spectrum mask and EVM requirement, the power amplifier with the digital predistorter can operate at higher output power and conversion efficiency than without the digital predistorter.

The interest in higher data rate systems is rising very quickly in the area of wireless communications. High data rates mean high Peak to Average Ratio, PAR. This imposes big challenge on the linearity requirement of Power Amplifiers, PAs. The simplest technique that has been used is backing off the PA. However, this leads to very inefficient performance. A lot of more complex techniques were suggested in the literatures to trick the tradeoff between linearity and efficiency. So we discuss the advantages and disadvantages of those techniques. In addition we suggest a new technique called Power Amplifier Linearization using a Mirror Predistorter. This technique is based on the use of a mirror PA that generates a copy of the main PA nonlinearity, and then feeds it in the proper phase and magnitude into the input in order to cancel the intermodulation terms at the output. Simulation and on the bench lab results validate the suggested technique. Also a hybrid PA module was designed and tested based on the suggested technique, and showed an improvement of 23 dB in the Third Order Intermodulation to Carrier ratio, IMD3 of the PA at 7.5 dB back off. / Master of Science

La thèse concerne les techniques de prédistorsion appliquées aux communications par satellite de type DVB-S2X dans la perspective de la montée en débit de ces systèmes. Pour atteindre cet objectif, de faibles facteurs de retombée (inférieurs à 5%) et desordres de modulation plus élevés sont préconisés, augmentant la vulnérabilitévis-à-vis des non-linéarités introduites lors du passage par le satellite. Dans la littérature, deux classes de méthodes se distinguent par leur performance de linéarisation. La première est constituée des architectures d’apprentissage direct (Direct Learning Architecture) et indirect(Indirect Learning Architecture) et la seconde regroupe les méthodes itératives basées sur le théorème du point fixe. Le principal défaut de la première classe est la nécessité de choisir une structure de prédistortion a priori tandis que pour la deuxième classe, les conditions d'application du théorème du point fixe sont difficiles à vérifier dans la majorité des cas et nécessitent l'addition d'un gain empirique. Nous avons donc proposé 1) un schéma de prédistorsion itérative basé sur le théorème du point fixe, appliqué sur le signal mais optimisé en minimisant une erreur quadratique entre les symboles de modulation et la sortie de l'échantillonneur, 2) un schéma de prédistorsion itérative incluant une adaptation automatique des paramètres et adapté à tout type de canal. / The thesis focuses on predistortion techniques applied to DVB-S2X satellite communications in order to increasing the throughput of these systems. To achieve this objective, sharp roll-off factors (less than 5%) and higher modulation orders are recommended, increasing sensibility with regard to the non-linearities introduced during the passage by the satellite. In the literature, two classes of methods are distinguished by their linearization performance. The first consists of direct (Direct Learning Architecture) and indirect (Indirect Learning Architecture) learning architectures and the latter includes iterative methods based on the fixed point theorem. The main defect of the first class is the need to choose a predistortion structure a priori, while for the second class, the conditions for applying the fixed point theorem are difficult to verify in most cases and require the addition of an empirical gain. We therefore proposed 1) an iterative predistortion scheme based on the fixed point theorem, applied to the signal but optimized by minimizing a quadratic error between the modulation symbols and the sampler output, 2) an iterative predistortion scheme including an automatic adaptation of the parameters and suitable for all types of channels.

Satellite radio has attained great popularity because of its wide range of geographical coverage and high signal quality as compared to the terrestrial broadcasts. Most Satellite Digital Radio (SDR) based systems favor multi-carrier transmission schemes, especially, orthogonal frequency division multiplexing (OFDM) transmission because of high data transfer rate and spectral efficiency. It is a challenging task to find a suitable platform that supports fast data rates and superior processing capabilities required for the development and deployment of the new SDR standards. Field programmable gate array (FPGA) devices have the potential to become suitable development platform for such standards. Another challenging factor in SDR systems is the distortion of variable envelope signals used in OFDM transmission by the nonlinear RF power amplifiers (PA) used in the base station transmitters. An attractive option is to use a linearizer that would compensate for the nonlinear effects of the PA. In this research, an OFDM transmitter, according to European Telecommunications Standard Institute (ETSI) SDR Technical Specifications 2007-2008, was designed and implemented on a low-cost Xilinx FPGA platform. A weakly nonlinear PA, operating in the L-band SDR frequency (1.450-1.490GHz), was used for signal transmission. An FPGA-based, low-cost, adaptive linearizer was designed and implemented based on the digital predistortion (DPD) reference design from Xilinx, to correct the distortion effects of the PA on the transmitted signal.

Radio frequency power amplifiers (PAs) are the most challenging part of the design of radio systems since they dictate the overall system's performance in terms of power efficiency and distortion generation. The performance is further challenged by modern modulation schemes which are characterized by highly varying signal envelopes. In order to meet the spectrum mask requirements, PAs are usually operated at high power back-off to ensure linearity, at the cost of efficiency. To tackle this issue, many efficiency enhancement techniques have been presented in the literature. In fact, these techniques do increase the PA power efficiency at back-off, however, efficiency enhancement techniques do not ensure the linearity of the PA. Furthermore, these techniques may lead to additional distortion. On the other hand, several linearization techniques have been developed to mitigate the PA nonlinearity problem and allow the PA to operate at less back-off. Digital Pre-Distortion (DPD) technique is gaining more attention, as compared to other linearization techniques, thanks to its simple concept and advancements in digital signal processors (DSP) and signal converters. DPD technique consists of introducing a nonlinear function before the PA so that the overall cascaded system behaves linearly. It was clear from the literature that this technique showed good performance. Yet, it has primarily been validated using commercial test equipment, which has good capabilities, and far from the real world environment in which this technique would be implemented. Indeed, DPDs would need to be implemented in signal processors characterised by limited resources and computational accuracy. This thesis presents an implementation of several DPD models, namely look-up table (LUT), memoryless polynomial and memory polynomial (MP), on a field programmable gate array (FPGA). A novel model reformulation made this implementation possible in fixed-point arithmetic. Measurements were collected to validate the DPD models' implementation and an improvement of the signal quality was recorded in terms of error vector magnitude (EVM) and adjacent channel leakage ratio (ACLR). As many wireless access technologies must continue to coexist, multi-standard radio systems are required to reduce the cost while maintaining the interoperability. This thesis presents a development platform for multimode radio which comprises mixed-signal modules. The platform provides the capacity for hardware and software development. In fact, the FPGA under investigation allowed for the implementation of a baseband transceiver and DPD schemes. In addition, a software tool was developed as a dashboard to control and monitor the system. The radio system in the platform was optimized through the equalization of the feedback receiver frequency response performed through a simultaneous measurement of the amplitude ripple of the transmitter and receiver. Furthermore, a phase-coherent frequency synthesizer was designed to bring more flexibility by allowing the transmitter's carrier frequency to be different from the receiver's frequency.

Satellite radio has attained great popularity because of its wide range of geographical coverage and high signal quality as compared to the terrestrial broadcasts. Most Satellite Digital Radio (SDR) based systems favor multi-carrier transmission schemes, especially, orthogonal frequency division multiplexing (OFDM) transmission because of high data transfer rate and spectral efficiency. It is a challenging task to find a suitable platform that supports fast data rates and superior processing capabilities required for the development and deployment of the new SDR standards. Field programmable gate array (FPGA) devices have the potential to become suitable development platform for such standards. Another challenging factor in SDR systems is the distortion of variable envelope signals used in OFDM transmission by the nonlinear RF power amplifiers (PA) used in the base station transmitters. An attractive option is to use a linearizer that would compensate for the nonlinear effects of the PA. In this research, an OFDM transmitter, according to European Telecommunications Standard Institute (ETSI) SDR Technical Specifications 2007-2008, was designed and implemented on a low-cost Xilinx FPGA platform. A weakly nonlinear PA, operating in the L-band SDR frequency (1.450-1.490GHz), was used for signal transmission. An FPGA-based, low-cost, adaptive linearizer was designed and implemented based on the digital predistortion (DPD) reference design from Xilinx, to correct the distortion effects of the PA on the transmitted signal.