Thesis (Ph. D.)--University of Washington, 2006. / Vita. Includes bibliographical references (leaves 163-183).

Software defined networking (SDN) is a relatively new paradigm that decouples individual network elements from the control logic, offering real-time network programmability, translating high level policy abstractions into low level device configurations. The framework comprises of the data (forwarding) plane incorporating network devices, while the control logic and network services reside in the control and application planes respectively. Operators can optimize the network fabric to yield performance gains for individual applications and services utilizing flow metering and application-awareness, the default traffic management method in SDN. Existing approaches to traffic optimization, however, do not explicitly consider user application trends. Recent SDN traffic engineering designs either offer improvements for typical time-critical applications or focus on devising monitoring solutions aimed at measuring performance metrics of the respective services. The performance caveats of isolated service differentiation on the end users may be substantial considering the growth in Internet and network applications on offer and the resulting diversity in user activities. Application-level flow metering schemes therefore, fall short of fully exploiting the real-time network provisioning capability offered by SDN instead relying on rather static traffic control primitives frequent in legacy networking. For individual users, SDN may lead to substantial improvements if the framework allows operators to allocate resources while accounting for a user-centric mix of applications. This thesis explores the user traffic application trends in different network environments and proposes a novel user traffic profiling framework to aid the SDN control plane (controller) in accurately configuring network elements for a broad spectrum of users without impeding specific application requirements. This thesis starts with a critical review of existing traffic engineering solutions in SDN and highlights recent and ongoing work in network optimization studies. Predominant existing segregated application policy based controls in SDN do not consider the cost of isolated application gains on parallel SDN services and resulting consequence for users having varying application usage. Therefore, attention is given to investigating techniques which may capture the user behaviour for possible integration in SDN traffic controls. To this end, profiling of user application traffic trends is identified as a technique which may offer insight into the inherent diversity in user activities and offer possible incorporation in SDN based traffic engineering. A series of subsequent user traffic profiling studies are carried out in this regard employing network flow statistics collected from residential and enterprise network environments. Utilizing machine learning techniques including the prominent unsupervised k-means cluster analysis, user generated traffic flows are cluster analysed and the derived profiles in each networking environment are benchmarked for stability before integration in SDN control solutions. In parallel, a novel flow-based traffic classifier is designed to yield high accuracy in identifying user application flows and the traffic profiling mechanism is automated. The core functions of the novel user-centric traffic engineering solution are validated by the implementation of traffic profiling based SDN network control applications in residential, data center and campus based SDN environments. A series of simulations highlighting varying traffic conditions and profile based policy controls are designed and evaluated in each network setting using the traffic profiles derived from realistic environments to demonstrate the effectiveness of the traffic management solution. The overall network performance metrics per profile show substantive gains, proportional to operator defined user profile prioritization policies despite high traffic load conditions. The proposed user-centric SDN traffic engineering framework therefore, dynamically provisions data plane resources among different user traffic classes (profiles), capturing user behaviour to define and implement network policy controls, going beyond isolated application management.

A maior parte dos mecanismos em processadores superescalares atuais usam granularidade de instrução para criar ou caracterizar especulações, tais como predição de desvios ou prefetchers. No entanto, muitas das características das instruções podem ser obtidas ao analisar uma granularidade mais grossa, o bloco básico de código, aumentando a quantidade de código coberta em um espaço similar de armazenamento. Adicionalmente, códigos podem ser analisados mais precisamente e prover uma variedade maior de informação ao observar diferentes tipos de instruções e suas relações. Devido a estas vantagens, a análise no nível de blocos pode fornecer mais oportunidades para mecanismos que necessitam desta informação. Por exemplo, é possível integrar informações de desvios mal previstos e acessos a memória para gerar informações mais precisas de quais acessos a memória oferecem melhor desempenho ao serem priorizados. Nesta tese propomos o Block-Level Architecture Profiler (BLAP) (Block Level Architecture Profiler), um mecanismo em hardware que caracteriza gargalos no nível microarquitetural, tal como loads delinquentes, desvios de difícil previsão e contenção nas unidades funcionais. O BLAP trabalha no nível de bloco básico, apenas detectando e fornecendo informações que podem ser usada para otimizar tais gargalos. Um mecanismo para a remoção de prefetches e uma política de controlador de memória DRAM foram criados para usar a informação criada pelo BLAP e demonstrar seu potencial. Juntos, estes mecanismos são capazes de melhorar o desempenho do sistema em até 17.39% (3.9% em média). Nosso método mostrou também ganhos médios de 13.14% quando avaliado com uma pressão na memória mais alta devido a prefetchers mais agressivos. / Most mechanisms in current superscalar processors use instruction granularity information for speculation, such as branch predictors or prefetchers. However, many of these characteristics can be obtained at the basic block level, increasing the amount of code that can be covered while requiring less space to store the data. Moreover, the code can be profiled more accurately and provide a higher variety of information by analyzing different instruction types inside a block. Because of these advantages, block-level analysis can offer more opportunities for mechanisms that use this information. For example, it is possible to integrate information about branch prediction and memory accesses to provide precise information for speculative mechanisms, increasing accuracy and performance. We propose a BLAP, an online mechanism that profiles bottlenecks at the microarchitectural level, such as delinquent memory loads, hard-to-predict branches and contention for functional units. BLAP works at the basic block level, providing information that can be used to reduce the impact of these bottlenecks. A prefetch dropping mechanism and a memory controller policy were developed to use the profiled information provided by BLAP. Together, these mechanisms are able to improve performance by up to 17.39% (3.90% on average). Our technique showed average gains of 13.14% when evaluated under high memory pressure due to highly aggressive prefetch.

A maior parte dos mecanismos em processadores superescalares atuais usam granularidade de instrução para criar ou caracterizar especulações, tais como predição de desvios ou prefetchers. No entanto, muitas das características das instruções podem ser obtidas ao analisar uma granularidade mais grossa, o bloco básico de código, aumentando a quantidade de código coberta em um espaço similar de armazenamento. Adicionalmente, códigos podem ser analisados mais precisamente e prover uma variedade maior de informação ao observar diferentes tipos de instruções e suas relações. Devido a estas vantagens, a análise no nível de blocos pode fornecer mais oportunidades para mecanismos que necessitam desta informação. Por exemplo, é possível integrar informações de desvios mal previstos e acessos a memória para gerar informações mais precisas de quais acessos a memória oferecem melhor desempenho ao serem priorizados. Nesta tese propomos o Block-Level Architecture Profiler (BLAP) (Block Level Architecture Profiler), um mecanismo em hardware que caracteriza gargalos no nível microarquitetural, tal como loads delinquentes, desvios de difícil previsão e contenção nas unidades funcionais. O BLAP trabalha no nível de bloco básico, apenas detectando e fornecendo informações que podem ser usada para otimizar tais gargalos. Um mecanismo para a remoção de prefetches e uma política de controlador de memória DRAM foram criados para usar a informação criada pelo BLAP e demonstrar seu potencial. Juntos, estes mecanismos são capazes de melhorar o desempenho do sistema em até 17.39% (3.9% em média). Nosso método mostrou também ganhos médios de 13.14% quando avaliado com uma pressão na memória mais alta devido a prefetchers mais agressivos. / Most mechanisms in current superscalar processors use instruction granularity information for speculation, such as branch predictors or prefetchers. However, many of these characteristics can be obtained at the basic block level, increasing the amount of code that can be covered while requiring less space to store the data. Moreover, the code can be profiled more accurately and provide a higher variety of information by analyzing different instruction types inside a block. Because of these advantages, block-level analysis can offer more opportunities for mechanisms that use this information. For example, it is possible to integrate information about branch prediction and memory accesses to provide precise information for speculative mechanisms, increasing accuracy and performance. We propose a BLAP, an online mechanism that profiles bottlenecks at the microarchitectural level, such as delinquent memory loads, hard-to-predict branches and contention for functional units. BLAP works at the basic block level, providing information that can be used to reduce the impact of these bottlenecks. A prefetch dropping mechanism and a memory controller policy were developed to use the profiled information provided by BLAP. Together, these mechanisms are able to improve performance by up to 17.39% (3.90% on average). Our technique showed average gains of 13.14% when evaluated under high memory pressure due to highly aggressive prefetch.

A maior parte dos mecanismos em processadores superescalares atuais usam granularidade de instrução para criar ou caracterizar especulações, tais como predição de desvios ou prefetchers. No entanto, muitas das características das instruções podem ser obtidas ao analisar uma granularidade mais grossa, o bloco básico de código, aumentando a quantidade de código coberta em um espaço similar de armazenamento. Adicionalmente, códigos podem ser analisados mais precisamente e prover uma variedade maior de informação ao observar diferentes tipos de instruções e suas relações. Devido a estas vantagens, a análise no nível de blocos pode fornecer mais oportunidades para mecanismos que necessitam desta informação. Por exemplo, é possível integrar informações de desvios mal previstos e acessos a memória para gerar informações mais precisas de quais acessos a memória oferecem melhor desempenho ao serem priorizados. Nesta tese propomos o Block-Level Architecture Profiler (BLAP) (Block Level Architecture Profiler), um mecanismo em hardware que caracteriza gargalos no nível microarquitetural, tal como loads delinquentes, desvios de difícil previsão e contenção nas unidades funcionais. O BLAP trabalha no nível de bloco básico, apenas detectando e fornecendo informações que podem ser usada para otimizar tais gargalos. Um mecanismo para a remoção de prefetches e uma política de controlador de memória DRAM foram criados para usar a informação criada pelo BLAP e demonstrar seu potencial. Juntos, estes mecanismos são capazes de melhorar o desempenho do sistema em até 17.39% (3.9% em média). Nosso método mostrou também ganhos médios de 13.14% quando avaliado com uma pressão na memória mais alta devido a prefetchers mais agressivos. / Most mechanisms in current superscalar processors use instruction granularity information for speculation, such as branch predictors or prefetchers. However, many of these characteristics can be obtained at the basic block level, increasing the amount of code that can be covered while requiring less space to store the data. Moreover, the code can be profiled more accurately and provide a higher variety of information by analyzing different instruction types inside a block. Because of these advantages, block-level analysis can offer more opportunities for mechanisms that use this information. For example, it is possible to integrate information about branch prediction and memory accesses to provide precise information for speculative mechanisms, increasing accuracy and performance. We propose a BLAP, an online mechanism that profiles bottlenecks at the microarchitectural level, such as delinquent memory loads, hard-to-predict branches and contention for functional units. BLAP works at the basic block level, providing information that can be used to reduce the impact of these bottlenecks. A prefetch dropping mechanism and a memory controller policy were developed to use the profiled information provided by BLAP. Together, these mechanisms are able to improve performance by up to 17.39% (3.90% on average). Our technique showed average gains of 13.14% when evaluated under high memory pressure due to highly aggressive prefetch.

Abstract Prostate cancer is the most common solid tumor among men in Western industrialized countries. A major problem in prostate cancer treatment is the development of androgen-independence, as androgen-deprivation therapy is the basic therapy for the disease. Molecular mechanisms behind prostate cancer and androgen-independent growth development are poorly known. In this study, subtractive hybridization was used for the generation of a cDNA library specific for prostate cancer. Analysis of the cDNA library revealed over-expression of several ribosomal proteins namely L4, L5, L7a, L23a, L30, L37, S14 and S18, in prostate cancer cell lines. Over-expression of L7a and L37 was also confirmed in prostate cancer tissue samples. Further, cDNA array was used in order to examine differentially expressed genes in androgen-dependent and androgen-independent prostate cancer cell line LNCaP. Monoamine oxidase A, an Expressed Sequence Tag (EST) similar to rat P044, and EST AA412049 were highly over-expressed in androgen-dependent LNCaP cells. Tissue-type plasminogen activator, interferon-inducible protein p78 (MxB), an EST similar to galectin-1, follistatin, fatty acid-binding protein 5, EST AA609749, annexin I, the interferon-inducible gene 1-8U and phospholipase D1 were highly over-expressed in androgen-independent LNCaP cells. The EST similar to rat P044, the EST similar to galectin-1, follistatin, annexin I and the interferon-inducible gene 1-8U were also expressed in benign prostatic hyperplasia tissue. The Y-linked ribosomal protein S4, Mat-8, and EST AA307912 were highly expressed in benign prostatic hyperplasia tissue. In situ hybridization of mouse embryos and adult mouse tissues revealed the expression of TMPRSS2 in the epithelium throughout the gastrointestinal, urogenital and respiratory tracts during development. In human multiple tissue RNA dot blot, the highest level of expression was detected in prostate, and lower levels in colon, stomach and salivary gland. TMPRSS2 transcript levels were significantly higher in prostate cancer tissue between benign and malignant epithelium of prostate cancer patients with untreated disease. Similarly, in poorly differentiated adenocarcinomas, expression in malignant tissue was significantly higher. Enzymatic mutation detection and direct sequencing of TMPRSS2 coding region revealed only one deletion in aggressive disease among 9 non-aggressive and 9 aggressive prostate cancer samples. No other mutations were found. Detected 7-base pair deletion leads to premature stop codon and disruption of serine protease substrate binding and catalytic active site. We cloned several potential genes whose expression is changed during prostate cancer initiation or progression. These genes may serve as prostate cancer markers, and further studies are needed to clarify the expression of these proteins during the disease.

As the embedded devices has become more and more generalized and as their product cycles keeps shrinking the field has opened up for the Application Specific Instruction set Processor. A mix between the classic generalized microcontroller and the specialized ASIC the ASIP keeps a set of general processing instructions for executing embedded software but combines that with a set of heavily specialized instructions for speeding up the data intense application core algorithms. One important aspect of the ASIP design flow research is cutting design time and cost. One way of that is automation of the instruction set design. In order to do so a process is needed where the algorithm to be ASIPed is analyzed and critical operations are found and exposed so that they can be implemented in special hardware. This process is called profiling. This thesis describes an implementation of a fine grained source code profiler for use in an ASIP design flow. The profiler software is based on a static-dynamic workflow where data is assembled from both static analysis and dynamic execution of the program and then analyzed together in an specially made analysis software.

Abstract Dentin forms the hard tissue portion of the dentin-pulp complex, while the dental pulp is soft connective tissue that retains the vitality of the dentin. Odontoblasts form the outermost cell layer of pulp and play a central role during dentin formation by producing and mineralizing the dentin matrix. The understanding of the defensive reactions in the dentin-pulp complex is limited. Information about the transcriptome and proteome of pulp tissue and odontoblasts would facilitate understanding of their functions during health and disease. The aim of this study was to investigate the expression profiles of human pulp tissue and odontoblasts in vivo and in vitro using large-scale expression analysis methods. Also, the suitability of these methods in pulp biological research in vivo and in vitro was evaluated. cDNA microarray revealed only minor variation and 2-D electrophoresis combined with mass spectrometry revealed no differences between healthy and carious teeth pulp tissue in vivo. The effect of transforming growth factor β1 (TGF-β1) on pulp and odontoblasts was studied in vitro using oligonucleotide-based microarrays, and marked changes in the transcriptome were revealed, especially in the expression of chemokine- and cytokine-related genes. Transiently increased interleukin expression was confirmed at the protein level by antibody array. DNA microarray analysis of native pulp tissue and odontoblasts was used to search for potential odontoblast markers. Only one gene related to extracellular matrix organization and biogenesis, matrilin 4, and two expressed sequence tags (ESTs), which represent transcribed sequences encoding possibly unknown genes, were identified in odontoblasts but not in pulp. Analysis of mature native odontoblasts and cultured odontoblast-like cells by DNA microarray revealed a high similarity (84%) between native and cultured cells. Also, differential expression levels of selected neuronal proteins were observed and confirmed at the mRNA and protein levels. In conclusion, microarray is a powerful tool for pulp biology, especially for in vitro studies. TGF-β1 was revealed as a potent regulator of proinflammatory responses in the dentin–pulp complex. In addition, several potential odontoblast markers were identified by microarray, and the similarity of cultured odontoblast-like cells used in the study with native odontoblasts was confirmed.

The theme of the thesis is psychological offender profiling and the possibilities that it offers in the investigation of arson cases. First it introduces profiling as an investigation method, including its history, the sources on which it is based, what kind of information it contains and how it is created. Next it follows up the problematic issue of fires, their investigation and the classification of intentionally set fires. It also introduces some particular arsonist offender subtypes. Then it pursues the arson profiling and introduces the main profiling approaches. In the end, the author applies the acquired findings to analyze two arson cases according to the particular profiling approaches and then compares the provided leads to a possible offender.

Cizojazyčné resumé This diploma thesis focuses on the method of psychological profiling of an offender. Psychological profiling, or simply profiling, is method aiming at an analysis of behavioural patterns of an offender which can be observed during crime investigation. The result of such analysis is a descriptive model of physical, psychological, and demographical features of the probable offender. Its purpose is to help the investigation of a crime mainly in the cases when the common criminological methods fail and there is little to no success shedding light on the crime - especially the criminal's identity. Profiling brings a new perspective and important information which could otherwise be overlooked by criminalists; a contribution that could lead to the crime being successfully solved. The thesis is divided into three chapters. The first chapter briefly explains the nature of psychological profiling and its place in the scientific field. Next, the work deals with terminological definition of psychological profiling and its gradual development abroad as well as in Czech Republic. In the last two subchapters, there is a list of crimes appropriate for the method of profiling and requirements for a profiling expert. The second chapter is divided into six subchapters concerned with the process of creating...