Intermediate band (IB) materials have attracted considerable research interest since they can dramatically enhance the near infrared light absorption and lead to applications in the fields of so-called intermediate band solar cells or infrared photodetectors. Hyperdoping Si with deep level impurities is one of the most effective approaches to form an IB inside Si. In this thesis, titanium (Ti) or chalcogen doped Si with concentrations far exceeding the Mott transition limits (~ 5×10^19 cm-3 for Ti) are fabricated by ion implantation followed by pulsed laser annealing (PLA) or flash lamp annealing (FLA). The structural and electrical properties of the implanted layer are investigated by channeling Rutherford backscattering spectrometry (cRBS) and Hall measurements. For Si supersaturated with Ti, it is shown that Ti-implanted Si after liquid phase epitaxy shows cellular breakdown at high doping concentrations during the rapid solidification, preventing Ti incorporation into Si matrix. However, the out-diffusion and the cellular breakdown can be effectively suppressed by solid phase epitaxy during FLA, leading to a much higher Ti incorporation. In addition, the formed microstructure of cellular breakdown also complicates the interpretation of the electrical properties. After FLA, the samples remain insulating even with the highest Ti implantation fluence, whereas the sheet resistance decreases with increasing Ti concentration after PLA. According to the results from conductive atomic force microscopy (C-AFM), the decrease of the sheet resistance after PLA is attributed to the percolation of Ti-rich cellular walls, but not to the insulator-to-metal transition due to Ti-doping. Se-hyperdoped Si samples with different Se concentrations are fabricated by ion implantation followed by FLA. The study of the structural properties of the implanted layer reveals that most Se atoms are located at substitutional lattice sites. Temperature-dependent sheet resistance shows that the insulator-to-metal transition occurs at a Se peak concentration of around 6.3 × 10^20 cm-3, proving the formation of an IB in host semiconductors. The correlation between the structural and electrical properties under different annealing processes is also investigated. The results indicate that the degrees of crystalline lattice recovery of the implanted layers and the Se substitutional fraction depend on pulse duration and energy density of the flash. The sample annealed at short pulse durations (1.3 ms) shows better conductivity than long pulse durations (20 ms). The electrical properties of the hyperdoped layers can be well-correlated to the structural properties resulting from different annealing processes.:Chapter 1 Introduction 1 1.1 Shallow and Deep level impurities in semiconductors 1 1.2 Challenges for hyperdoping semiconductors with deep level Impurities 2 1.3 Solid vs. liquid phase epitaxy 5 1.4 Previous work 7 1.4.1 Transition metal in Si 7 1.4.2 Chalcogens in Si 10 1.5 The organization of this thesis 15 Chapter 2 Experimental methods 18 2.1 Ion implantation 18 2.1.1 Basic principle of ion implantation 18 2.1.2 Ion implantation equipment 19 2.1.3 Energy loss 20 2.2 Pulsed laser annealing (PLA) 23 2.3 Flash lamp annealing (FLA) 24 2.4 Rutherford backscattering and channeling spectrometry (RBS/C) 27 2.4.1 Basic principles 27 2.4.2 Analysis of the elements in the target 28 2.4.3 Channeling and RBS/C 29 2.4.4 Analysis of the impurity lattice location 31 2.5 Hall measurements 31 2.5.1 Sample preparation 32 2.5.2 Resistivity 32 2.5.3 Hall measurements 33 Chapter 3 Suppressing the cellular breakdown in silicon supersaturated with titanium 34 3.1 Introduction 34 3.2 Experimental 35 3.3 Results 36 3.4 Conclusions 42 Chapter 4 Titanium-implanted silicon: does the insulator-to-metal transition really happen? 44 4.1 Introduction 44 4.2 Experimental section 45 4.3 Results 47 4.3.1 Recrystallization of Ti-implanted Si 47 4.3.2 Lattice location of Ti impurities 48 4.3.3 Electrical conduction 50 4.3.4 Surface morphology 52 4.3.5 Spatially resolved conduction 53 4.4 Discussion 55 4.5 Conclusion 56 Chapter 5 Realizing the insulator-to-metal transition in Se hyperdoped Si via non-equilibrium material processing 57 5.1 Introduction 57 5.2 Experimental 59 5.3 Results 60 5.4 Conclusions 65 Chapter 6 Structural and electrical properties of Se-hyperdoped Si via ion implantation and flash lamp annealing 67 6.1 Introduction 67 6.2 Experimental 68 6.3 Results 69 6.4 Conclusions 76 Chapter 7 Summary and outlook 78 7.1 Summary 78 7.2 Outlook 81 References 83 Publications 89

Supersaturated substitutional alloys formed by ion implantation and rapid liquid-phase epitaxial regrowth induced by pulsed-laser annealing have been studied using Rutherford-backscattering and ion-channeling analysis. A series of impurities (As, Sb, Bi, Ga, In, Fe, Sn, Cu) have been implanted into single-crystal (001) orientation silicon at doses ranging from 1 x 10^15/cm2 to 1 x 10^17/cm2. The samples were subsequently annealed with a Ω-switched ruby laser (energy density ~1.5 J/cm2, pulse duration 15 x 10-9 sec). Ion-channeling analysis shows that laser annealing incorporates the Group III (Ga, In) and Group V (As, Sb, Bi) impurities into substitutional lattice sites at concentrations far in excess of the equilibrium solid solubility. Channeling measurements indicate the silicon crystal is essentially defect free after laser annealing. The maximum Group III and Group V dopant concentrations that can be incorporated into substitutional lattice sites are determined for the present laser-annealing conditions. Dopant profiles have been measured before and after annealing using Rutherford backscattering. These experimental profiles are compared to theoretical model calculations which incorporate both dopant diffusion in liquid silicon and a distribution coefficient (k') from the liquid. It is seen that a distribution coefficient (k') far greater than the equilibrium value (k0) is required for the calculation to fit the experimental data. In the cases of Fe, Zn, and Cu, laser annealing causes the impurities to segregate toward the surface. After annealing, none of these impurities are observed to be substitutional in detectable concentrations. The systematics of these alloys systems are discussed.

Within the framework of this thesis, the influence of non equilibrium post growth thermal treatments of ion implanted and epitaxially grown Ge1-xSnx and Si1-x-yGeySnx layers for nano and optoelectronic devices has been investigated. The main focus has been placed on the study and development of thermal treatment conditions to improve the as grown layer quality and the fabrication of Ge1-xSnx and Si1-x-yGeySnx on SOI JNTs. In addition, through layer characterization, exhaustive analysis has provided deep insight into key material properties and the alloy´s response to the thermal treatment. For instance, (i) the conversion of as grown in plane compressive strained Ge1-xSnx into in-plane tensile strained Ge1-xSnx after PLA that is required for high mobility n-type transistors and (ii) the evolution of monovacancies to larger vacancy clusters due to post growth thermal treatments. Moreover, the adaption of CMOS compatible fabrication approaches to the novel Ge1-xSnx and Si1-x-yGeySnx alloys allowed the successful fabrication of first lateral n-type JNTs on SOI with remarkable Ion/Ioff ratios of up to 10^8 to benchmark the alloy performance.:I. Table of contents II. Abstract III. Kurzfassung (Abstract in German) IV. List of Abbreviations V. List of Symbols VI. List of Figures VII. List of Tables 1 Introduction 2 Fabrication and properties of Ge1 xSnx and Si1 x yGeySnx alloys 2.1 Alloy formation 2.2 Strain and defects 2.3 Electrical and optical properties 2.3.1 Band structure of strain relaxed alloys 2.3.2 Band structure of strained alloys 2.3.3 Doping influenced properties 2.3.4 Electrical properties 2.4 Thermal treatments 2.4.1 Rapid thermal annealing 2.4.2 Flash lamp annealing 2.4.3 Pulsed laser annealing 2.5 Summary 3 Experimental setups 3.1 Molecular beam epitaxy (MBE) 3.2 Ion beam implantation 3.3 Pulsed laser annealing (PLA) 3.4 Flash lamp annealing (FLA) 3.5 Micro Raman spectroscopy 3.6 Rutherford backscattering spectrometry (RBS) 3.7 X ray diffraction (XRD) 3.8 Secondary ion mass spectrometry (SIMS) 3.9 Hall effect measurement 3.10 Transmission electron microscopy (TEM) 3.11 Positron annihilation spectroscopy (PAS) 3.12 Cleanroom 4 Post growth thermal treatments of Ge1-xSnx alloys 4.1 Post growth pulsed laser annealing 4.1.1 Material fabrication and PLA annealing 4.1.2 Microstructural investigation 4.1.3 Strain relaxation and optical properties 4.1.4 Electrical properties and defect analysis 4.1.5 Strain relaxed Ge1-xSnx as virtual substrates 4.1.6 Conclusion 4.2 Post growth flash lamp annealing 4.2.1 Material fabrication and r FLA annealing 4.2.2 Alloy composition and strain analysis 4.2.3 Defect investigation 4.2.4 Dopant distribution and activation 4.2.5 Conclusion 5 Fabrication of Ge1-xSnx and Si1-x-yGeySnx alloys on SOI 5.1 Alloy fabrication with ion beam implantation and FLA 5.1.1 Si1-x-yGeySnx formation via implantation and FLA 5.1.2 Si1-x-yGeySnx on SOI fabrication via implantation and FLA 5.1.3 Recrystallization of Si1-x-yGeySnx on SOI by FLA 5.1.4 P and Ga doping of Si1 x yGeySnxOI via implantation and FLA 5.1.5 Conclusion 5.2 MBE and post growth thermal treatments of Ge1-xSnx and Si1-x-yGeySnx on SOI 5.2.1 MBE growth of Ge0.94Sn0.06 and Si0.14Ge0.80Sn0.06 on SOI 5.2.2 Microstructure of as grown Ge0.94Sn0.06 and Si0.14Ge0.80Sn0.06 5.2.3 Microstructure after post growth thermal treatments 5.2.4 Dopant concentration and distribution 5.2.5 Conclusion 6 Ge1-xSnx and Si1-x-yGeySnx on SOI junctionless transistors 6.1 Operation principle of n type JLFETs 6.2 Fabrication of n-type JNTs 6.3 Electrical characterization 6.3.1 JNT performance evolution during processing 6.3.2 JNT performance in dependence on post growth PLA 6.3.3 Gate configuration of Ge1-xSnx JNTs 6.3.4 Influence of post fabrication FLA on Ge1-xSnx JNTs 6.4 Conclusion 7 Conclusion and future prospects References 8 Appendix 8.1 Sample list and fabrication details for Chapter 4 8.2 Extended RBS information 8.3 Extended TEM analysis for section 4.1.2 8.4 Strain calculation based on (224) RSM 8.5 Strain calculation by µ Raman 8.6 Analysis of Hall effect measurements 8.7 VEPFit and ATSUP simulations 8.8 Strain relaxation of Ge0.89Sn0.11 for section 4.1.5 8.9 COMSOL simulation of FLA temperature 8.10 ECV measurement setup 8.11 Datasheet of the SOI wafers 8.12 Sample list of Chapter 5 8.13 Calculation of the ion beam implantation parameter by SRIM 8.14 RBS simulation results for section 5.1 8.15 GI XRD and (224) XRD RSM results for section 5.1 8.16 SIMS limitations for section 5.1.4 8.17 RBS of Ge1-xSnx on SOI for section 5.2.3 8.18 Fit procedure for SOI RSM peak positions 8.19 Supporting µ Raman results for section 5.2.3 8.20 Process details for n-JNT fabrication 8.21 Flat band voltage VFB and on current Ion of JNTs 8.22 Ioff, Imax, Ion/Ioff and Imax/Ioff ratio of JNTs 8.23 Subthreshold swing SS calculation of JNTs 8.24 Threshold voltage Vth of JNTs 187 8.25 Gate configuration of Si1-x-yGeySnx JNTs 8.26 n-type transistors compared in Chapter 7 8.27 Annealing setup description