• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 2
  • Tagged with
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 1
  • 1
  • 1
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Graphical Support for the Design and Evaluation of Configurable Logic Blocks

Erxleben, Fredo 15 January 2016 (has links) (PDF)
Developing a tool supporting humans to design and evaluate CLB-based circuits requires a lot of know-how and research from different fields of computer science. In this work, the newly developed application q2d, especially its design and implementation will be introduced as a possible tool for approaching CLB circuit development with graphical UI support. Design decisions and implementation will be discussed and a workflow example will be given.
2

Graphical Support for the Design and Evaluation of Configurable Logic Blocks

Erxleben, Fredo 06 May 2015 (has links)
Developing a tool supporting humans to design and evaluate CLB-based circuits requires a lot of know-how and research from different fields of computer science. In this work, the newly developed application q2d, especially its design and implementation will be introduced as a possible tool for approaching CLB circuit development with graphical UI support. Design decisions and implementation will be discussed and a workflow example will be given.:1 Introduction 1.1 Forethoughts 1.2 Theoretical Background 1.2.1 Definitions 1.2.2 Expressing Connections between Circuit Elements 1.2.3 Global Context and Target Function 1.2.4 Problem formulation as QBF and SAT 2 Description of the Implemented Tool 2.1 Design Decisions 2.1.1 Choice of Language, Libraries and Frameworks 2.1.2 Solving the QBF Problem 2.1.3 Design of the Internally Used Meta-Model 2.1.4 User Interface Ergonomics 2.1.5 Aspects of Schematic Visualization 2.1.6 Limitations 2.2 Implemented Features 2.2.1 Basic Interaction 2.2.2 User-Defined Components 2.2.3 Generation of Circuit Symbols 2.2.4 Methods for Specifying Functional Behaviour 3 Implementation Details 3.1 Classes Involved in the Component Meta-Model 3.2 The Document Entry Class and its Factory 3.3 Model and View 3.3.1 The Model Element Hierarchy 3.3.2 The Schematics Element Hierarchy 3.4 The Quantor Interface 4 An Example Workflow 4.1 The Task 4.2 A Component Descriptor for Xilinx’ LUT6-2 4.3 Designing the Model 4.4 Computing the Desired Configuration 5 Summary and Outlook 5.1 Achieved Results 5.2 Suggested Improvements References A Acronyms and Glossary B UML Diagrams

Page generated in 0.088 seconds