ABSTRACTThe global retail business is always changing and this change brings new issues in front of us and deserves responsibilities to address these issues. The Textile Retail Business is also experiencing this change as the whole retail textile supply chain has already become globalized with the time especially in terms of sourcing of raw materials and production as well. This phenomenon has raised the questions of threats regarding sustainability and resiliency of the supply chain. Today’s retailers are working closely with these topics in a competition basis to achieve competitive advantages in their supply chain. This dissertation aims to sketch out the possible latent challenges for which the companies prefer to work with a scattered supply chain in terms of different geographical location as it involves lot of time, transportation and business risks. Additionally this scattered supply chain disputes the environmental and resilient approach of the total chain. Moreover, we try to shed light to validate the inter-relation between ecological sustainability and resiliency of the supply chain. Based on the case study on two companies having different sizes but similar values towards environment which are also located in different geographical region, we have tried to find out the answers. Companies build up supply chain firstly evaluating flexibility and resiliency of their own supply chain only by considering the technology availability, quality and pricing involved with the product and then they want to be sustainable and resilient by addressing other issues. The main challenges for the companies to alter their position are the product specific characteristics, availability of knowhow and the suitable process cost involved with product. It has proposed for the companies who are working with numerous supply chains located in different geographical location to do some adjustments among their nearby suppliers for a typical product on experimental basis especially providing technological and logistics support to their suppliers. / Program: Magisterutbildning i Applied Textile Management

The Von-Neumann bottleneck, a major challenge in computer architecture, results from significant data transfer delays between the processor and main memory. Crossbar arrays utilizing spin-based devices like Magnetoresistive Random Access Memory (MRAM) aim to overcome this bottleneck by offering advantages in area and performance, particularly for tasks requiring linear transformations. These arrays enable single-cycle and in-memory vector-matrix multiplication, reducing overheads, which is crucial for energy and area-constrained Internet of Things (IoT) sensors and embedded devices. This dissertation focuses on designing, implementing, and evaluating reconfigurable computation platforms that leverage MRAM-based crossbar arrays and analog computation to support deep learning and error resilience implementations. One key contribution is the investigation of Spin Torque Transfer MRAM (STT-MRAM) technology scaling trends, considering power dissipation, area, and process variation (PV) across different technology nodes. A predictive model for power estimation in hybrid CMOS/MTJ technology has been developed and validated, along with new metrics considering the Internet of Things (IoT) energy profile of various applications. The dissertation introduces the Spintronically Configurable Analog Processing in-memory Environment (SCAPE), integrating analog arithmetic, runtime reconfigurability, and non-volatile devices within a selectable 2-D topology of hybrid spin/CMOS devices. Simulation results show improvements in error rates, power consumption, and power-error-product metric for real-world applications like machine learning and compressive sensing, while assessing process variation impact. Additionally, it explores transportable approaches to more robust SCAPE implementations, including applying redundancy techniques for artificial neural network (ANN)-based digit recognition applications. Generic redundancy techniques are developed and applied to hybrid spin/CMOS-based ANNs, showcasing improved/comparable accuracy with smaller-sized networks. Furthermore, the dissertation examines hardware security considerations for emerging memristive device-based applications, discussing mitigation approaches against malicious manufacturing interventions. It also discusses reconfigurable computing for AI/ML applications based on state-of-the-art FPGAs, along with future directions in adaptive computing architectures for AI/ML at the edge of the network.