International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / There are two misty understandings about PCM telemetry system in conventional concept: Waveform can not be restored accurately; to be restored accurately, a measured signal must be sampled at a higher sample rate. This paper discusses that by making use of multi-sample rate DSP technology, the sample rate of a measured signal can be reduced in transmission equipment, or system precision can be retained even if the performance of low pass filter declined.

Probe speed data are widely used to calculate performance measures for quantifying state-wide traffic conditions. Estimation of the accurate performance measures requires adequate speed data observations. However, probe vehicles reporting the speed data may not be available all the time on each road segment. Agencies need to develop a good understanding of the adequacy of these reported data before using them in different transportation applications. This study attempts to systematically assess the quality of the probe data by proposing a method, which determines the minimum sample rate for checking data adequacy. The minimum sample rate is defined as the minimum required speed data for a segment ensuring the speed estimates within a defined error range. The proposed method adopts a bootstrapping approach to determine the minimum sample rate within a pre-defined acceptance level. After applying the method to the speed data, the results from the analysis show a minimum sample rate of 10% for Kentucky’s roads. This cut-off value for Kentucky’s roads helps to identify the segments where the availability is greater than the minimum sample rate. This study also shows two applications of the minimum sample rates resulted from the bootstrapping. Firstly, the results are utilized to identify the geometric and operational factors that contribute to the minimum sample rate of a facility. Using random forests regression model as a tool, functional class, section length, and speed limit are found to be the significant variables for uninterrupted facility. Contrarily, for interrupted facility, signal density, section length, speed limit, and intersection density are the significant variables. Lastly, the speed data associated with the segments are applied to improve Free Flow Speed estimation by the traditional model.

In this Master Thesis the possibility of connecting standard products wirelessly to MOST, a multimedia network for vehicles, is investigated. The wireless technique analysed is Bluetooth. The report theoretically describes how MOST could be integrated with Bluetooth via a gateway. Future scenarios that are made possible by this gateway are also described. The solution describes how a connection could be established and how the synchronous audio is transferred from a Bluetooth sound source to the MOST network. / I detta examensarbete studeras möjligheten att ansluta standardprodukter trådlöst till MOST, ett multimedianätverk för fordon. Den trådlösa tekniken som analyseras är Bluetooth. Rapporten beskriver teoretiskt hur MOST ska integreras med Bluetooth via en gateway och tar även upp olika framtida scenarier som möjliggörs med hjälp av denna gateway. Lösningen beskriver hur en förbindelse kan upprättas och ljuddata överföras från en ljudkälla till MOST-nätet med hjälp av Bluetooth-teknik.

<p>In this Master Thesis the possibility of connecting standard products wirelessly to MOST, a multimedia network for vehicles, is investigated. The wireless technique analysed is Bluetooth. The report theoretically describes how MOST could be integrated with Bluetooth via a gateway. Future scenarios that are made possible by this gateway are also described. The solution describes how a connection could be established and how the synchronous audio is transferred from a Bluetooth sound source to the MOST network.</p> / <p>I detta examensarbete studeras möjligheten att ansluta standardprodukter trådlöst till MOST, ett multimedianätverk för fordon. Den trådlösa tekniken som analyseras är Bluetooth. Rapporten beskriver teoretiskt hur MOST ska integreras med Bluetooth via en gateway och tar även upp olika framtida scenarier som möjliggörs med hjälp av denna gateway. Lösningen beskriver hur en förbindelse kan upprättas och ljuddata överföras från en ljudkälla till MOST-nätet med hjälp av Bluetooth-teknik. </p>

Variable digital filters (VDF) find many application areas in communication, audio, speech and image processing. This thesis analyzes design and implementation of FIR digital filters with variable frequency characteristics and introduces two design methods. The design and implementation of the proposed methods are realized on Matlab software program. Various filter design examples and comparisons are also outlilned. One of the major application areas of VDFs is software defined radio (SDR). The interpolation problem on sample rate converter (SRC) unit of the SDR is solved by using these filters. Realizations of VDFs on SRC are outlined and described. Simulations on Simulink and a specific hardware are examined.

No description available.

Increasing sampling rates and sampling accuracies of analog-to-digital converters (ADCs) are growing the importance of digital data acquisition and signal processing for applications requiring high bandwidth. In this context, this work is focused on researching and developing new techniques and a new system architecture for optimal throughput and minimal intrinsic dead time. The investigations of this work concentrate on event processing systems by pulse shaping on SuperSampleRate (SSR) ADC data streams. SSR ADC data streams are data streams which require processing of more than one sample per clock cycle by digital circuits. To implement data processing in this work only Field Programmable Gate Arrays (FPGAs) are used, as they provide the right approach for high throughput and minimum dead time with ability to adapt to high- application-specific circuits afterwards. As a result of this work a system architecture was developed which decouples the event acquisition and their processing inside the FPGA. This property is realized by a special FIFO structure in the FPGA. This concept achieves an intrinsic dead time of one ADC sample period and allows pre-processing of all channels by multiple instantiated processing cores and scheduling in hardware. By means of this new system architecture, two conventional scientific measuring instruments based on analog technology were improved by digital data acquisition and signal processing. These measuring instruments are a spectrometer for time-differential perturbed angular correlations (TDPAC) and a digital spectrometer and data acquisition system at a nuclear microprobe for ion beam analysis and imaging. Both measuring instruments detect elementary particles or radiation emitted by the measuring sample by detectors as events. The time curves of several analog detector output signals (channels) are now recorded by ADCs and forwarded without loss as SSR data streams to one FPGA. The hardware used here are FPGA digitizers which isolate the data acquisition and subsequent pre-processing by FPGAs into modules. The improvement of the measuring efficiency of the two digital measuring instruments was achieved by minimizing the dead time, increasing the throughput, and by matching their time and energy resolutions with the conventional measuring instruments. Specifically to enable better time and energy resolutions combined with maximum throughput, this work has developed and implemented parallel processing SSR FIR and SSR IIR filters for pulse shaping as processing cores in the FPGAs which can handle multiple samples per clock cycle. To match the time resolution performance of conventional Constant Fraction Discriminators (CFDs) these filter implementations realize a digital Constant Fraction Trigger (CFT) with fractional delays (below one sampling period). In this work the energy resolution was optimized by implementing a transfer function adjustable SSR IIR filter. Thus the filter provides maximum flexibility for pulse shaping of different detector types. By implementing the computationally intensive pre-processing in FPGAs, the measuring instruments could be equipped with only one underutilized PC, which can now implement new functionalities. These functionalities include a runtime-optimized coincidence measurement of stretched cascades (like for 180mHf) for the TDPAC spectrometer and a digital pileup rejection for the data acquisition system for ion beam analysis. / Die digitale Messwerterfassung und -verarbeitung erhält unter anderem durch steigende Abtastraten und Abtastgenauigkeiten von Analog-Digital-Wandlern (ADCs) wachsende Bedeutung für Anwendungen, welche eine hohe Bandbreite voraussetzen. In diesem Rahmen widmet sich diese Arbeit der Erforschung und Entwicklung neuer Techniken und einer neuen Systemarchitektur, mit denen eine Datenaufnahme und anschließende Signalverarbeitung, bei optimalem Durchsatz und minimaler intrinsische Totzeit umgesetzt werden kann. Die Untersuchungen fokussieren sich dabei auf Systeme zur Ereignisverarbeitung durch Impulsformung (pulse shaping) auf SuperSampleRate(SSR)-ADC-Datenströmen. SSR-ADC-Datenströme sind dabei ADC-Datenströme, welche eine Verarbeitung durch digitale Schaltungen benötigen, bei denen mehr als ein Sample pro Taktzyklus behandelt werden muss, um Datenverlust zu verhindern. Zur Implementierung der Datenverarbeitung kommen dazu ausschließlich Field Programmable Gate Arrays (FPGAs) zum Einsatz, da diese den passenden Ansatz für digitale Schaltungen mit hohen Durchsatz und minimaler Totzeit mit gleichzeitiger nachträglicher Anpassbarkeit für hoch anwendungsspezifische Schaltungen bieten. Als Ergebnis wurde in dieser Arbeit eine Systemarchitektur entwickelt, welche die Ereigniserfassung und deren Verarbeitung im FPGA voneinander entkoppelt. Dies wird durch eine im FPGA realisierte FIFO-Struktur ermöglicht. Durch dieses Konzept wird eine intrinsische Totzeit der Systeme in der Größenordnung der ADC-Abtastperiodenlänge erreicht und eine Vorverarbeitung aller Kanäle durch mehrfache instanziierte Verarbeitungskerne und Scheduling in Hardware ermöglicht. Mittels dieser neuen Systemarchitektur werden zwei auf analogtechnisch basierende konventionelle wissenschaftliche Messinstrumente, durch digitale Messwerterfassung und Signalverarbeitung, verbessert. Bei diesen Messinstrumenten handelt es sich um ein Spektrometer zur zeitaufgelösten gestörten Winkelkorrelation (engl. Time Differential Perturbed Angular Correlation (kurz TDPAC-Spektrometer)) und ein Datenerfassungssystem zur ortsaufgelösten elementspezifischen Ionenstrahlanalyse und Ionenstrahlmikroskopie, welche im Wesentlichen von der Messprobe emittierte und durch Detektoren erfasste Elementarteilchen oder Strahlung als Ereignisse verarbeiten. Die Verläufe der analogen Detektorausgangssignale werden dabei mittels ADCs erfasst und verlustfrei als SSR-Datenströme an einen FPGA weitergeleitet. Dabei werden mehrere ADC-Datenströme (dann Kanäle genannt) von einem FPGA verarbeitet. Als Hardware kommen hier FPGA-Digitizer zum Einsatz. Diese Module isolieren die digitale Messwerterfassung durch ADCs und eine anschließende Vorverarbeitung von FPGAs, deren digitale Schaltung individuell implementiert werden kann, in eine Hardware. Eine Verbesserung der Messeffizienz der beiden digitalisierten Messinstrumente konnte durch die Minimierung der Totzeit, die Erhöhung des Durchsatzes aber auch durch die Anknüpfung ihrer Zeit- und Energieauflösung der detektierten Ereignisse erreicht werden. Speziell zur Ermöglichung besserer Zeit- und Energieauflösungen von Detektorereignissen mit maximalem Durchsatz wurden in dieser Arbeit SSR-FIR- und SSR-IIR-Filter zur Impulsformung als Verarbeitungskerne in den verwendeten FPGAs implementiert, welche pro Taktzyklus mehrere Samples verarbeiten können. Diese Filterimplementierungen setzen zur Optimierung der Zeitauflösung im Subsample-Bereich mit den Constant Fraction Trigger (CFT) an der Leistungsfähigkeit konventioneller Constant Fraction Discriminator (CFDs) an und ermöglichen ebenso Fractional Delays (Zeitverzögerungen unter einer Abtastperiode). Die Energieauflösung wurde in dieser Arbeit dadurch optimiert, dass der entwickelte SSR-IIR-Filter in seiner Übertragungsfunktion anpassbar ist und so maximale Flexibilität zur Impulsformung unterschiedlicher Detektortypen bietet. Durch die Umsetzung der rechenintensiven Vorverarbeitung in FPGAs konnten die Messinstrumente mit lediglich einem Mess-PC ausgestattet werden, welcher nun neue Funktionalitäten umsetzen kann. Zu diesen Funktionalitäten gehört eine laufzeitoptimierte Koinzidenzmessung gestreckter Kaskaden (Kaskade mit mehr als einem Start-Ereignis) für das TDPAC-Spektrometer und eine digitale Pileup-Verwerfung für das Datenerfassungssystem zur Ionenstrahlanalyse.

This thesis is focussed on designing of the air drop labradory for testing the balistic recovery systems. The first part of the thesis describes balistic recovery systems, their parts as well as methods of testing this devices. In the second charter there is a description of older vision of a testing device and simple test with the electronics of the testing device. The next step is designing of the new koncept of testing device and the structure analysis of the frame. The product of the thesis is a modular automated testing device, which is able to test balistic recovery systems for aicrafts with the weights between 230 and 1700 kilograms.

In this work, the design and application of Polynomial-Based Filters (PBF) for continuously variable Sample Rate Conversion (SRC) is studied. The major contributions of this work are summarized as follows. First, an explicit formula for the Fourier Transform of both a symmetrical and nonsymmetrical PBF impulse response with variable basis function coefficients is derived. In the literature only one explicit formula is given, and that for a symmetrical even length filter with fixed basis function coefficients. The frequency domain optimization of PBFs via linear programming has been proposed in the literature, however, the algorithm was not detailed nor were explicit formulas derived. In this contribution, a minimax optimization procedure is derived for the frequency domain optimization of a PBF with time-domain constraints. Explicit formulas are given for direct input to a linear programming routine. Additionally, accompanying Matlab code implementing this optimization in terms of the derived formulas is given in the appendix. In the literature, it has been pointed out that the frequency response of the Continuous-Time (CT) filter decays as frequency goes to infinity. It has also been observed that when implemented in SRC, the CT filter is sampled resulting in CT frequency response aliasing. Thus, for example, the stopband sidelobes of the Discrete-Time (DT) implementation rise above the CT designed level. Building on these observations, it is shown how the rolloff rate of the frequency response of a PBF can be adjusted by adding continuous derivatives to the impulse response. This is of great advantage, especially when the PBF is used for decimation as the aliasing band attenuation can be made to increase with frequency. It is shown how this technique can be used to dramatically reduce the effect of alias build up in the passband. In addition, it is shown that as the number of continuous derivatives of the PBF increases the resulting DT implementation more closely matches the Continuous-Time (CT) design. When implemented for SRC, samples from a PBF impulse response are computed by evaluating the polynomials using a so-called fractional interval, µ. In the literature, the effect of quantizing µ on the frequency response of the PBF has been studied. Formulas have been derived to determine the number of bits required to keep frequency response distortion below prescribed bounds. Elsewhere, a formula has been given to compute the number of bits required to represent µ to obtain a given SRC accuracy for rational factor SRC. In this contribution, it is shown how these two apparently competing requirements are quite independent. In fact, it is shown that the wordlength required for SRC accuracy need only be kept in the µ generator which is a single accumulator. The output of the µ generator may then be truncated prior to polynomial evaluation. This results in significant computational savings, as polynomial evaluation can require several multiplications and additions. Under the heading of applications, a new Wideband Digital Downconverter (WDDC) for Synthetic Instruments (SI) is introduced. DDCs first tune to a signal's center frequency using a numerically controlled oscillator and mixer, and then zoom-in to the bandwidth of interest using SRC. The SRC is required to produce continuously variable output sample rates from a fixed input sample rate over a large range. Current implementations accomplish this using a pre-filter, an arbitrary factor resampler, and integer decimation filters. In this contribution, the SRC of the WDDC is simplified reducing the computational requirements to a factor of three or more. In addition to this, it is shown how this system can be used to develop a novel computationally efficient FFT-based spectrum analyzer with continuously variable frequency spans. Finally, after giving the theoretical foundation, a real Field Programmable Gate Array (FPGA) implementation of a novel Arbitrary Waveform Generator (AWG) is presented. The new approach uses a fixed Digital-to-Analog Converter (DAC) sample clock in combination with an arbitrary factor interpolator. Waveforms created at any sample rate are interpolated to the fixed DAC sample rate in real-time. As a result, the additional lower performance analog hardware required in current approaches, namely, multiple reconstruction filters and/or additional sample clocks, is avoided. Measured results are given confirming the performance of the system predicted by the theoretical design and simulation.

Software radios (SWR) have been proposed for wireless communication systems to enable them to operate according to incompatible wireless communication standards by implementing most analog functions in the digital section on software-reprogrammable hardware. However, this significantly increases the required computations for SWR functionality, mainly because of the digital front-end computationally intensive filtering functions, such as sample rate conversion (SRC), channelization, and equalization. For increasing the computational efficiency of SWR systems, two new SRC methods with better performance than conventional SRC methods are presented. In the first SRC method, we modify the conventional CIC filters to enable them to perform SRC on slightly oversampled signals efficiently. We also describe a SRC method with high efficiency for SRC by factors greater than unity at which SRC in SWR systems may be computationally demanding. This SRC method efficiently increases the sample rate of wideband signals, especially in SWR base station transmitters, by applying Lagrange interpolation for evaluating output samples hierarchically using a low-rate signal that is computed with low cost from the input signal. A new channelizer/synthesizer is also developed for extracting/combining frequency multiplexed channels in SWR transceivers. The efficiency of this channelizer/synthesizer, which uses modulated perfect reconstruction (PR) filter banks, is higher than polyphase filter banks (when applicable) for processing few channels, and significantly higher than discrete filter banks for processing any number of variable-bandwidth channels where polyphase filter banks are inapplicable. Because the available methods for designing modulated PR filter banks are inapplicable due to the required number of subchannels and stopband attenuation of the prototype filters, a new design method for these filter banks is introduced. This method is reliable and significantly faster than the existing methods. Modulated PR filter banks are also considered for implementing a frequency-domain block blind equalizer capable of equalizing SWR signals transmitted though channels with long impulse responses and severe intersymbol interference (ISI). This blind equalizer adapts by using separate sets of weights to correct for the magnitude and phase distortion of the channel. The adaptation of this blind equalizer is significantly more reliable and its computational requirements increase at a lower rate compared to conventional time-domain equalizers making it efficient for equalizing long channels that exhibit severe ISI.