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1	Postoje k jazyku v Norsku a České republice ze sociolingvistického hlediska / Language attitudes in Norway and the Czech Republic from a sociolinguistic point of view Řezníková, Ivana January 2012 (has links) The subject of the master thesis is language attitudes. The focus is put on how language attitudes can affect the way how the language is changing, how they can be expressed and which factors play important roles in forming of language attitudes. There have been a number of sociological and sociolinguistic case studies in this field in Norway. Based on them, I compare the Norwegian and Czech attitudes to the latest trends in language change such as globalization, regionalization and others. The main questions are: how do factors forming language attitudes to language varieties differ when compared Norwegian and Czech? How are language attitudes affected by differencies in history and culture in these two lands? Hypothetical, the factors connected to contact with English would be quite similar both in Norwegian and Czech. On the other hand the relationship between standard spoken language and dialects would differ more mostly because of these varieties have a different status in Norwegian and Czech context.
2	Implementation of a Program Address Generator in a DSP processor / Implementering av en Programadress generator i en DSP processor Waltersson, Roland January 2003 (has links) <p>The purpose of this thesis is to construct a"Program Address Generator"(PAG) to a 24-bit Harvard type, RISC DSP processor using the VHDL language. The PAG is a part of the program control unit, and should consist of the following units: </p><p>A system stack for storing jump and loop information. A program counter, a status register, a stack pointer, an operating mode register and two registers called loop address and loop counter register, to support hardware loops. </p><p>The PAG handles the fetch stage of the processor pipeline, and should handle instructions such as the jump, subroutine jump, return from subroutine/interrupt and loop instructions, among others. </p><p>The PAG was successfully designed, and its function verified through extensive tests, where common combinations of ASM instructions were tested. Files for automated testing was created, to support easy testing if only small changes are applied to the PAG.</p> Electronics DSP Program Control Unit VHDL fetch pipeline branch hazard RISC stack program counter status register Elektronik Electronics Elektronik
3	Implementation of a Program Address Generator in a DSP processor / Implementering av en Programadress generator i en DSP processor Waltersson, Roland January 2003 (has links) The purpose of this thesis is to construct a"Program Address Generator"(PAG) to a 24-bit Harvard type, RISC DSP processor using the VHDL language. The PAG is a part of the program control unit, and should consist of the following units: A system stack for storing jump and loop information. A program counter, a status register, a stack pointer, an operating mode register and two registers called loop address and loop counter register, to support hardware loops. The PAG handles the fetch stage of the processor pipeline, and should handle instructions such as the jump, subroutine jump, return from subroutine/interrupt and loop instructions, among others. The PAG was successfully designed, and its function verified through extensive tests, where common combinations of ASM instructions were tested. Files for automated testing was created, to support easy testing if only small changes are applied to the PAG. Electronics DSP Program Control Unit VHDL fetch pipeline branch hazard RISC stack program counter status register Elektronik Electronics Elektronik

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